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It is just more readable than %v.
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This patch adds instruction generator for ARM64 based on the descriptions
provided as part of Go's arm64asm package. It also implements support for
pseudo-instructions for calling ARM64 hypercalls.
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Make sure random text generation works as a whole, not just for single instructions.
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The code to send rand source is dublicated in several packages.
Move it to testutil package.
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ifuzzimpl is too lenghty and too clumsy on my taste
(nm/vmimpl worked better b/c it's shorter and used less).
I've tried to come up with something shorter and nicer.
We could use "insn" as a common name for "instruction" in ifuzz,
but it's a commonly used name already so would cause lots of conflicts.
"iset" is somewhat descriptive, short and nice.
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It's currently duplicated in x86 and powerpc.
Move to ifuzzimpl.
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We don't need GetMode, GetPriv, IsCompatible in Insn interface.
Replace GetName and GetPseudo with single Info method.
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ModeInsns is only used in tests. Move it there.
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ifuzzimpl imports the public interface package ifuzz
and prog package needs to import ifuzzimpl (implementation guts that
nobody outside of ifuzz should care about). This is not right.
Invert everything so that prog package only needs to import ifuzz
and ifuzz imports ifuzzimpl.
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Testing different arches is a good use for sub-tests.
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This adds KVM's syz_kvm_setup_cpu pseudo syscall. This adds placeholder
for options (none implemented yet).
This adds instruction generator for ifuzz; this also adds a few pseudo
instructions to simulate super/hyper/ultracalls
(a PPC64/pseries platform thing).
The insns.go is generated from PowerISA_public.v3.0B.pdf [1] by
a horrendous python3 script on top of pdftotext. The ISA covers POWER9
which is the latest available POWER CPU at the moment. The next ISA
for POWER10 is quite different and we will deal with it later.
The // comment after every instruction is a fixed opcode list for
verification purposes.
This does not define DecodeExt as there is no obvious replacement of
the Intel XED library for POWERPC (gapstone-capstone, later, may be).
[1] https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0
Signed-off-by: Alexey Kardashevskiy <aik@linux.ibm.com>
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At the moment ifuzz only generates x86 instructions. In order to support
instruction fuzzing for others (ARM, POWERPC), some separation of
the common and arch layers is needed.
This adds 2 packages:
1. "x86" where x86 instruction generator goes to
2. "ifuzzimpl which contains some common code.
The goal was to keep changes to the rand.go to the minimum.
The next patch will use this when adding PPC64.
This should cause no behavioural change.
Signed-off-by: Alexey Kardashevskiy <aik@linux.ibm.com>
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In preparation to running some tests as github actions.
Both Travis and Github define CI env var, while TRAVIS is, well,
too Travis-specific.
Update #1699
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Update #977
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Don't use random seed on travis as it produces flaky coverage reports,
and probably generally better for CI setting.
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This helps to ignore generated code with gometalinter.
There is currently no other way:
https://github.com/alecthomas/gometalinter/issues/270
Update #538
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