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-rw-r--r--executor/common_kvm_ppc64.h77
-rw-r--r--executor/common_linux.h2
-rw-r--r--executor/test.h4
-rw-r--r--executor/test_linux.h8
-rw-r--r--pkg/compiler/types.go4
-rw-r--r--pkg/csource/gen.go1
-rw-r--r--pkg/csource/generated.go138
-rw-r--r--pkg/host/syscalls_linux.go4
-rw-r--r--pkg/ifuzz/ifuzz.go3
-rw-r--r--pkg/ifuzz/ifuzz_test.go3
-rwxr-xr-xpkg/ifuzz/powerpc/gen/powerisa30_to_syz356
-rw-r--r--pkg/ifuzz/powerpc/generated/empty.go6
-rw-r--r--pkg/ifuzz/powerpc/generated/insns.go1181
-rw-r--r--pkg/ifuzz/powerpc/powerpc.go165
-rw-r--r--pkg/ifuzz/powerpc/pseudo.go108
-rw-r--r--prog/rand.go9
-rw-r--r--prog/types.go1
-rw-r--r--sys/linux/dev_kvm.txt18
18 files changed, 2083 insertions, 5 deletions
diff --git a/executor/common_kvm_ppc64.h b/executor/common_kvm_ppc64.h
new file mode 100644
index 000000000..f03ce42df
--- /dev/null
+++ b/executor/common_kvm_ppc64.h
@@ -0,0 +1,77 @@
+// Copyright 2020 syzkaller project authors. All rights reserved.
+// Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
+
+// This file is shared between executor and csource package.
+
+// Implementation of syz_kvm_setup_cpu pseudo-syscall.
+// See Intel Software Developer’s Manual Volume 3: System Programming Guide
+// for details on what happens here.
+
+#include "kvm.h"
+
+struct kvm_text {
+ uintptr_t typ;
+ const void* text;
+ uintptr_t size;
+};
+
+// syz_kvm_setup_cpu(fd fd_kvmvm, cpufd fd_kvmcpu, usermem vma[24], text ptr[in, array[kvm_text, 1]], ntext len[text], flags flags[kvm_setup_flags], opts ptr[in, array[kvm_setup_opt, 0:2]], nopt len[opts])
+static long syz_kvm_setup_cpu(volatile long a0, volatile long a1, volatile long a2, volatile long a3, volatile long a4, volatile long a5, volatile long a6, volatile long a7)
+{
+ const int vmfd = a0;
+ const int cpufd = a1;
+ char* const host_mem = (char*)a2;
+ const struct kvm_text* const text_array_ptr = (struct kvm_text*)a3;
+ const uintptr_t text_count = a4;
+
+ const uintptr_t page_size = 16 << 10;
+ const uintptr_t guest_mem_size = 256 << 20;
+ const uintptr_t guest_mem = 0;
+
+ (void)text_count; // fuzzer can spoof count and we need just 1 text, so ignore text_count
+ const void* text = 0;
+ uintptr_t text_size = 0;
+ NONFAILING(text = text_array_ptr[0].text);
+ NONFAILING(text_size = text_array_ptr[0].size);
+
+ for (uintptr_t i = 0; i < guest_mem_size / page_size; i++) {
+ struct kvm_userspace_memory_region memreg;
+ memreg.slot = i;
+ memreg.flags = 0; // can be KVM_MEM_LOG_DIRTY_PAGES | KVM_MEM_READONLY
+ memreg.guest_phys_addr = guest_mem + i * page_size;
+ memreg.memory_size = page_size;
+ memreg.userspace_addr = (uintptr_t)host_mem + i * page_size;
+ ioctl(vmfd, KVM_SET_USER_MEMORY_REGION, &memreg);
+ }
+
+ struct kvm_regs regs;
+ struct kvm_sregs sregs;
+ if (ioctl(cpufd, KVM_GET_SREGS, &sregs))
+ return -1;
+ if (ioctl(cpufd, KVM_GET_REGS, &regs))
+ return -1;
+
+ // PPC64LE, real mode: MSR_LE | MSR_SF
+ regs.msr = 1ULL | (1ULL << 63);
+
+ memcpy(host_mem, text, text_size);
+
+ if (ioctl(cpufd, KVM_SET_SREGS, &sregs))
+ return -1;
+ if (ioctl(cpufd, KVM_SET_REGS, &regs))
+ return -1;
+
+ // Hypercalls need to be enable so we enable them all here to
+ // allow fuzzing
+#define MAX_HCALL 0x450
+ for (unsigned hcall = 4; hcall < MAX_HCALL; hcall += 4) {
+ struct kvm_enable_cap cap = {
+ .cap = KVM_CAP_PPC_ENABLE_HCALL,
+ .flags = 0,
+ .args = {hcall, 1},
+ };
+ ioctl(vmfd, KVM_ENABLE_CAP, &cap);
+ }
+
+ return 0;
+}
diff --git a/executor/common_linux.h b/executor/common_linux.h
index acb3acde7..16b78e99a 100644
--- a/executor/common_linux.h
+++ b/executor/common_linux.h
@@ -2905,6 +2905,8 @@ error_clear_loop:
#include "common_kvm_amd64.h"
#elif GOARCH_arm64
#include "common_kvm_arm64.h"
+#elif GOARCH_ppc64 || GOARCH_ppc64le
+#include "common_kvm_ppc64.h"
#elif !GOARCH_arm
static long syz_kvm_setup_cpu(volatile long a0, volatile long a1, volatile long a2, volatile long a3, volatile long a4, volatile long a5, volatile long a6, volatile long a7)
{
diff --git a/executor/test.h b/executor/test.h
index bd30fb372..37d03b65a 100644
--- a/executor/test.h
+++ b/executor/test.h
@@ -1,7 +1,7 @@
// Copyright 2017 syzkaller project authors. All rights reserved.
// Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
-#if GOOS_linux && GOARCH_amd64
+#if GOOS_linux && (GOARCH_amd64 | GOARCH_ppc64 | GOARCH_ppc64le)
#include "test_linux.h"
#endif
@@ -208,7 +208,7 @@ static struct {
{"test_copyin", test_copyin},
{"test_csum_inet", test_csum_inet},
{"test_csum_inet_acc", test_csum_inet_acc},
-#if GOOS_linux && GOARCH_amd64
+#if GOOS_linux && (GOARCH_amd64 || GOARCH_ppc64 || GOARCH_ppc64le)
{"test_kvm", test_kvm},
#endif
};
diff --git a/executor/test_linux.h b/executor/test_linux.h
index fcd8d855e..428fba967 100644
--- a/executor/test_linux.h
+++ b/executor/test_linux.h
@@ -75,11 +75,13 @@ static int test_one(int text_type, const char* text, int text_size, int flags, u
dump_cpu_state(cpufd, (char*)vm_mem);
return 1;
}
+#ifdef GOARCH_amd64
if (check_rax && regs.rax != 0xbadc0de) {
printf("wrong result: rax=0x%llx\n", (long long)regs.rax);
dump_cpu_state(cpufd, (char*)vm_mem);
return 1;
}
+#endif
munmap(vm_mem, vm_mem_size);
munmap(cpu_mem, cpu_mem_size);
close(cpufd);
@@ -108,6 +110,7 @@ static int test_kvm()
const char text8[] = "\x66\xb8\xde\xc0\xad\x0b";
if ((res = test_one(8, text8, sizeof(text8) - 1, 0, KVM_EXIT_HLT, true)))
return res;
+#ifdef GOARCH_amd64
if ((res = test_one(8, text8, sizeof(text8) - 1, KVM_SETUP_VIRT86, KVM_EXIT_SHUTDOWN, true)))
return res;
if ((res = test_one(8, text8, sizeof(text8) - 1, KVM_SETUP_VIRT86 | KVM_SETUP_PAGING, KVM_EXIT_SHUTDOWN, true)))
@@ -161,6 +164,7 @@ static int test_kvm()
if ((res = test_one(32, text_rsm, sizeof(text_rsm) - 1, KVM_SETUP_SMM, KVM_EXIT_HLT, false)))
return res;
}
+#endif
return 0;
}
@@ -179,14 +183,17 @@ static unsigned host_kernel_version()
return major * 100 + minor;
}
+#ifdef GOARCH_amd64
static void dump_seg(const char* name, struct kvm_segment* seg)
{
printf("%s: base=0x%llx limit=0x%x sel=0x%x type=%d p=%d dpl=%d, db=%d s=%d l=%d g=%d\n",
name, seg->base, seg->limit, seg->selector, seg->type, seg->present, seg->dpl, seg->db, seg->s, seg->l, seg->g);
}
+#endif
static void dump_cpu_state(int cpufd, char* vm_mem)
{
+#ifdef GOARCH_amd64
struct kvm_sregs sregs;
if (ioctl(cpufd, KVM_GET_SREGS, &sregs)) {
printf("KVM_GET_SREGS failed (%d)\n", errno);
@@ -219,4 +226,5 @@ static void dump_cpu_state(int cpufd, char* vm_mem)
((long long*)vm_mem)[i], ((long long*)vm_mem)[i + 1], ((long long*)vm_mem)[i + 2], ((long long*)vm_mem)[i + 3]);
}
}
+#endif
}
diff --git a/pkg/compiler/types.go b/pkg/compiler/types.go
index 3c22038f8..b2c8c3204 100644
--- a/pkg/compiler/types.go
+++ b/pkg/compiler/types.go
@@ -548,7 +548,7 @@ var typeText = &typeDesc{
var typeArgTextType = &typeArg{
Kind: kindIdent,
- Names: []string{"target", "x86_real", "x86_16", "x86_32", "x86_64", "arm64"},
+ Names: []string{"target", "x86_real", "x86_16", "x86_32", "x86_64", "arm64", "ppc64"},
}
func genTextType(t *ast.Type) prog.TextKind {
@@ -565,6 +565,8 @@ func genTextType(t *ast.Type) prog.TextKind {
return prog.TextX86bit64
case "arm64":
return prog.TextArm64
+ case "ppc64":
+ return prog.TextPpc64
default:
panic(fmt.Sprintf("unknown text type %q", t.Ident))
}
diff --git a/pkg/csource/gen.go b/pkg/csource/gen.go
index efdf6bb82..53b34bbc2 100644
--- a/pkg/csource/gen.go
+++ b/pkg/csource/gen.go
@@ -32,6 +32,7 @@ func main() {
"common_test.h",
"common_kvm_amd64.h",
"common_kvm_arm64.h",
+ "common_kvm_ppc64.h",
"common_usb_linux.h",
"common_usb_netbsd.h",
"common_usb.h",
diff --git a/pkg/csource/generated.go b/pkg/csource/generated.go
index 75f228a7f..5e234d47a 100644
--- a/pkg/csource/generated.go
+++ b/pkg/csource/generated.go
@@ -7180,6 +7180,144 @@ static long syz_kvm_setup_cpu(volatile long a0, volatile long a1, volatile long
return 0;
}
+#elif GOARCH_ppc64 || GOARCH_ppc64le
+
+#define ADDR_TEXT 0x0000
+#define ADDR_GDT 0x1000
+#define ADDR_LDT 0x1800
+#define ADDR_PML4 0x2000
+#define ADDR_PDP 0x3000
+#define ADDR_PD 0x4000
+#define ADDR_STACK0 0x0f80
+#define ADDR_VAR_HLT 0x2800
+#define ADDR_VAR_SYSRET 0x2808
+#define ADDR_VAR_SYSEXIT 0x2810
+#define ADDR_VAR_IDT 0x3800
+#define ADDR_VAR_TSS64 0x3a00
+#define ADDR_VAR_TSS64_CPL3 0x3c00
+#define ADDR_VAR_TSS16 0x3d00
+#define ADDR_VAR_TSS16_2 0x3e00
+#define ADDR_VAR_TSS16_CPL3 0x3f00
+#define ADDR_VAR_TSS32 0x4800
+#define ADDR_VAR_TSS32_2 0x4a00
+#define ADDR_VAR_TSS32_CPL3 0x4c00
+#define ADDR_VAR_TSS32_VM86 0x4e00
+#define ADDR_VAR_VMXON_PTR 0x5f00
+#define ADDR_VAR_VMCS_PTR 0x5f08
+#define ADDR_VAR_VMEXIT_PTR 0x5f10
+#define ADDR_VAR_VMWRITE_FLD 0x5f18
+#define ADDR_VAR_VMWRITE_VAL 0x5f20
+#define ADDR_VAR_VMXON 0x6000
+#define ADDR_VAR_VMCS 0x7000
+#define ADDR_VAR_VMEXIT_CODE 0x9000
+#define ADDR_VAR_USER_CODE 0x9100
+#define ADDR_VAR_USER_CODE2 0x9120
+
+#define SEL_LDT (1 << 3)
+#define SEL_CS16 (2 << 3)
+#define SEL_DS16 (3 << 3)
+#define SEL_CS16_CPL3 ((4 << 3) + 3)
+#define SEL_DS16_CPL3 ((5 << 3) + 3)
+#define SEL_CS32 (6 << 3)
+#define SEL_DS32 (7 << 3)
+#define SEL_CS32_CPL3 ((8 << 3) + 3)
+#define SEL_DS32_CPL3 ((9 << 3) + 3)
+#define SEL_CS64 (10 << 3)
+#define SEL_DS64 (11 << 3)
+#define SEL_CS64_CPL3 ((12 << 3) + 3)
+#define SEL_DS64_CPL3 ((13 << 3) + 3)
+#define SEL_CGATE16 (14 << 3)
+#define SEL_TGATE16 (15 << 3)
+#define SEL_CGATE32 (16 << 3)
+#define SEL_TGATE32 (17 << 3)
+#define SEL_CGATE64 (18 << 3)
+#define SEL_CGATE64_HI (19 << 3)
+#define SEL_TSS16 (20 << 3)
+#define SEL_TSS16_2 (21 << 3)
+#define SEL_TSS16_CPL3 ((22 << 3) + 3)
+#define SEL_TSS32 (23 << 3)
+#define SEL_TSS32_2 (24 << 3)
+#define SEL_TSS32_CPL3 ((25 << 3) + 3)
+#define SEL_TSS32_VM86 (26 << 3)
+#define SEL_TSS64 (27 << 3)
+#define SEL_TSS64_HI (28 << 3)
+#define SEL_TSS64_CPL3 ((29 << 3) + 3)
+#define SEL_TSS64_CPL3_HI (30 << 3)
+
+#define MSR_IA32_FEATURE_CONTROL 0x3a
+#define MSR_IA32_VMX_BASIC 0x480
+#define MSR_IA32_SMBASE 0x9e
+#define MSR_IA32_SYSENTER_CS 0x174
+#define MSR_IA32_SYSENTER_ESP 0x175
+#define MSR_IA32_SYSENTER_EIP 0x176
+#define MSR_IA32_STAR 0xC0000081
+#define MSR_IA32_LSTAR 0xC0000082
+#define MSR_IA32_VMX_PROCBASED_CTLS2 0x48B
+
+#define NEXT_INSN $0xbadc0de
+#define PREFIX_SIZE 0xba1d
+
+
+struct kvm_text {
+ uintptr_t typ;
+ const void* text;
+ uintptr_t size;
+};
+static long syz_kvm_setup_cpu(volatile long a0, volatile long a1, volatile long a2, volatile long a3, volatile long a4, volatile long a5, volatile long a6, volatile long a7)
+{
+ const int vmfd = a0;
+ const int cpufd = a1;
+ char* const host_mem = (char*)a2;
+ const struct kvm_text* const text_array_ptr = (struct kvm_text*)a3;
+ const uintptr_t text_count = a4;
+
+ const uintptr_t page_size = 16 << 10;
+ const uintptr_t guest_mem_size = 256 << 20;
+ const uintptr_t guest_mem = 0;
+
+ (void)text_count;
+ const void* text = 0;
+ uintptr_t text_size = 0;
+ NONFAILING(text = text_array_ptr[0].text);
+ NONFAILING(text_size = text_array_ptr[0].size);
+
+ for (uintptr_t i = 0; i < guest_mem_size / page_size; i++) {
+ struct kvm_userspace_memory_region memreg;
+ memreg.slot = i;
+ memreg.flags = 0;
+ memreg.guest_phys_addr = guest_mem + i * page_size;
+ memreg.memory_size = page_size;
+ memreg.userspace_addr = (uintptr_t)host_mem + i * page_size;
+ ioctl(vmfd, KVM_SET_USER_MEMORY_REGION, &memreg);
+ }
+
+ struct kvm_regs regs;
+ struct kvm_sregs sregs;
+ if (ioctl(cpufd, KVM_GET_SREGS, &sregs))
+ return -1;
+ if (ioctl(cpufd, KVM_GET_REGS, &regs))
+ return -1;
+ regs.msr = 1ULL | (1ULL << 63);
+
+ memcpy(host_mem, text, text_size);
+
+ if (ioctl(cpufd, KVM_SET_SREGS, &sregs))
+ return -1;
+ if (ioctl(cpufd, KVM_SET_REGS, &regs))
+ return -1;
+#define MAX_HCALL 0x450
+ for (unsigned hcall = 4; hcall < MAX_HCALL; hcall += 4) {
+ struct kvm_enable_cap cap = {
+ .cap = KVM_CAP_PPC_ENABLE_HCALL,
+ .flags = 0,
+ .args = {hcall, 1},
+ };
+ ioctl(vmfd, KVM_ENABLE_CAP, &cap);
+ }
+
+ return 0;
+}
+
#elif !GOARCH_arm
static long syz_kvm_setup_cpu(volatile long a0, volatile long a1, volatile long a2, volatile long a3, volatile long a4, volatile long a5, volatile long a6, volatile long a7)
{
diff --git a/pkg/host/syscalls_linux.go b/pkg/host/syscalls_linux.go
index 16cfbfa46..cb7950440 100644
--- a/pkg/host/syscalls_linux.go
+++ b/pkg/host/syscalls_linux.go
@@ -199,6 +199,10 @@ func isSyzKvmSetupCPUSupported(c *prog.Syscall, target *prog.Target, sandbox str
if runtime.GOARCH == targets.ARM64 {
return true, ""
}
+ case "syz_kvm_setup_cpu$ppc64":
+ if runtime.GOARCH == "ppc64le" || runtime.GOARCH == "ppc64" {
+ return true, ""
+ }
}
return false, "unsupported arch"
}
diff --git a/pkg/ifuzz/ifuzz.go b/pkg/ifuzz/ifuzz.go
index 1939f440e..4b51b30f3 100644
--- a/pkg/ifuzz/ifuzz.go
+++ b/pkg/ifuzz/ifuzz.go
@@ -53,7 +53,8 @@ type InsnSet interface {
}
const (
- ArchX86 = "x86"
+ ArchX86 = "x86"
+ ArchPowerPC = "powerpc"
)
var SpecialNumbers = [...]uint64{0, 1 << 15, 1 << 16, 1 << 31, 1 << 32, 1 << 47, 1 << 47, 1 << 63}
diff --git a/pkg/ifuzz/ifuzz_test.go b/pkg/ifuzz/ifuzz_test.go
index a5052e581..173c7aec6 100644
--- a/pkg/ifuzz/ifuzz_test.go
+++ b/pkg/ifuzz/ifuzz_test.go
@@ -12,6 +12,7 @@ import (
"github.com/google/syzkaller/pkg/ifuzz"
"github.com/google/syzkaller/pkg/ifuzz/ifuzzimpl"
+ _ "github.com/google/syzkaller/pkg/ifuzz/powerpc/generated"
_ "github.com/google/syzkaller/pkg/ifuzz/x86/generated"
)
@@ -39,6 +40,7 @@ func testmodearch(t *testing.T, arch string) {
func TestMode(t *testing.T) {
testmodearch(t, ifuzz.ArchX86)
+ testmodearch(t, ifuzz.ArchPowerPC)
}
func testdecodearch(t *testing.T, arch string) {
@@ -118,4 +120,5 @@ func testdecodearch(t *testing.T, arch string) {
func TestDecode(t *testing.T) {
testdecodearch(t, ifuzz.ArchX86)
+ testdecodearch(t, ifuzz.ArchPowerPC)
}
diff --git a/pkg/ifuzz/powerpc/gen/powerisa30_to_syz b/pkg/ifuzz/powerpc/gen/powerisa30_to_syz
new file mode 100755
index 000000000..7f675c143
--- /dev/null
+++ b/pkg/ifuzz/powerpc/gen/powerisa30_to_syz
@@ -0,0 +1,356 @@
+#! /usr/bin/env python3
+
+# Copyright 2020 syzkaller project authors. All rights reserved.
+# Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
+
+import re
+import sys
+import pprint
+import subprocess
+
+
+def add_stat(m, s):
+ if s in m:
+ m[s] += 1
+ else:
+ m[s] = 1
+
+def add_fmt_ins(m, fmt, ins):
+ if fmt in m:
+ m[fmt] += [ins]
+ else:
+ m[fmt] = [ins]
+
+pagecache = {}
+
+pdf2txt = "/home/aik/powerisa/xpdf-4.02/build/xpdf/pdftotext"
+isa_pdf = sys.argv[1]
+isa_pagenum_correction = {
+ 'vadduqm': 3,
+ 'rldicl[.]': -1,
+ 'dcbtst': -1,
+ 'dcbf': -1,
+ 'dcbz': -1,
+ 'fmsubs[.]': -1,
+ 'fmsub[.]': -1,
+ 'rldicr[.]': -2,
+ 'rldcl[.]': 1,
+ 'rldcr[.]': 2
+ }
+
+def myint(s):
+ try:
+ return int(s)
+ except:
+ return None
+
+f = open("outp", 'w+')
+
+def read_pdf_page(pnum, store = False):
+ global pagecache
+
+ pagenum = str(pnum)
+ if pagenum in pagecache:
+ return pagecache[pagenum]
+
+ tmp = subprocess.check_output([pdf2txt, '-enc', "Latin1", "-f", pagenum, "-l", pagenum, "-nopgbrk", "-nodiag",
+ "-table",
+ isa_pdf, "-"])
+ tmp = tmp.decode("Latin1").split("\n")
+ ret = []
+
+ for t in range(len(tmp)):
+ if tmp[t] == "":
+ continue
+ ret += [tmp[t]]
+
+ if store:
+ off = 0
+ for t in range(len(tmp)):
+ t2 = re.match(r"\b0\b\s+[\d\s]+?\b31\b", tmp[t])
+ if t2:
+ if t2.start() == 0:
+ off = t2.end() + 2
+ break
+ off = t2.start()
+ break
+ for t in range(len(tmp)):
+ t2 = re.search(r"\b0\b\s+[\d\s]+?\b31\b", tmp[t][30:])
+ if t2:
+ off = max(off, t2.span()[0] + 30)
+ break
+ if not off:
+ print("!!! No idea how to split {}".format(pagenum))
+ sys.exit(-1)
+
+ f.write("===== page {}\n".format(pagenum))
+ ret2 = []
+ for c in ret[1:-1]:
+ t = c[:off].strip()
+ if not t:
+ continue
+ t = re.sub(r'\s+', ' ', t)
+ ret2 += [t]
+ f.write(t + "\n")
+ for c in ret[1:-1]:
+ t = c[off:].strip()
+ if not t:
+ continue
+ t = re.sub(r'\s+', ' ', t)
+ ret2 += [t]
+ f.write(t + "\n")
+ ret = ret2
+
+ pagecache[pagenum] = ret
+ return ret
+
+def find_pdf_pagenumber_offset():
+ opcodes_first_page = None
+ opcodes_last_page = None
+ for i in range(15, 100):
+ tmp = read_pdf_page(i)
+ if not tmp:
+ continue
+
+ print("Reading page {}: '{}'".format(i, tmp[-1]), file = sys.stderr)
+ if not opcodes_first_page:
+ for t in tmp:
+ t2 = re.match(r'.*Set Sorted by Opcode[\s\.]+(\d+)', t)
+ if t2:
+ print("Found: {}".format(t2.groups()), file = sys.stderr)
+ opcodes_first_page = int(t2.group(1))
+ continue
+ t2 = re.match(r'.*Set Sorted by Version[\s\.]+(\d+)', t)
+ if t2:
+ print("Found: {}".format(t2.groups()), file = sys.stderr)
+ opcodes_last_page = int(t2.group(1)) - 1
+ break
+
+ t2 = re.match(r'^(\d+)\s+.*$', tmp[-1])
+ if not t2:
+ t2 = re.match(r'.*\s+(\d+)$', tmp[-1])
+ if t2:
+ first_page = int(t2.group(1))
+ if first_page < 100:
+ first_page = i - 1
+ break
+ return first_page, opcodes_first_page, opcodes_last_page
+
+pageoffset, opcodes_first_page, opcodes_last_page = find_pdf_pagenumber_offset()
+print("Offset = {}, opcodes on pages {}..{} (phys pages {}..{})".format(pageoffset, opcodes_first_page, opcodes_last_page, opcodes_first_page + pageoffset, opcodes_last_page + pageoffset), file = sys.stderr)
+
+def add_mode_priv(mode, priv):
+ ret = ""
+ if "64" in mode:
+ ret += ", M64: true"
+ if "P" in priv or "H" in priv:
+ ret += ", Priv: true"
+ return ret
+
+def ppcmask(val, s, l):
+ return (val & ((1 << l) - 1)) << (31 - (s + l - 1))
+
+def do_sorted_opcodes(fmt_map, ins_stat):
+ ins_num = 0
+
+ for i in range(opcodes_first_page, opcodes_last_page):
+ tmp = read_pdf_page(i + pageoffset)[1:-1] # skip header and page number
+
+ for line in tmp:
+ #print(line)
+ tmp = re.match(r'^\s+Instruction1\s+Format.*', line)
+ if tmp:
+ priv_off = line.find("Privilege3")
+ mode_off = line.find("Mode Dep4")
+
+ tmp = re.match(r'([\.01]{6})\s+([/\.01]{5})\s+([/\.01]{5})\s+([/\.01]{5})\s+([/\.01]{5})\s+([/\.01]{6})\s+(B|X|XO|D|VX|VC|VA|SC|I|XL|DX|M|D|MD|MDS|XFX|XX1|XS|DQ|DS|Z22|Z23|A|XX3|XX4|XX2|XFL)\s+(\S+)\s+(\d+)\s+(\S+)\s+(PPC|P1|P2|v2.00|v2.01|v2.02|v2.03|v2.04|v2.05|v2.06|v2.07|v3.0|v3.0B)(.*)', line)
+
+ if not tmp:
+ continue
+ ins0_5 = tmp.group(1)
+ ins6_10 = tmp.group(2)
+ ins11_15 = tmp.group(3)
+ ins16_20 = tmp.group(4)
+ ins21_25 = tmp.group(5)
+ ins26_31 = tmp.group(6)
+ fmt = tmp.group(7)
+ ins_book = tmp.group(8)
+ pagenum = int(tmp.group(9))
+ mnem = tmp.group(10).replace("_", "")
+ if mnem == "paste[.]":
+ mnem = "paste."
+ ins_isa = tmp.group(11)
+
+ priv = line[priv_off:priv_off + 4].strip()
+ mode = line[mode_off:mode_off + 4].strip()
+ ins_desc = line[mode_off + 4:].strip()
+
+ add_stat(ins_stat, "Fmt " + fmt)
+ add_stat(ins_stat, "Priv " + priv)
+ add_stat(ins_stat, "Mod " + mode)
+ add_fmt_ins(fmt_map, "Fmt " + fmt, mnem)
+
+ if re.match(r'^[01]+$', ins0_5 + ins6_10 + ins11_15 + ins16_20 + ins21_25 + ins26_31):
+ outp = 'Name: "{}", Opcode: 0x{:08x}, Mask: 0xFFFFFFFF'.format(mnem,
+ int(ins0_5 + ins6_10 + ins11_15 + ins16_20 + ins21_25 + ins26_31, 2))
+ outp += add_mode_priv(mode, priv)
+ print("{" + outp + "},")
+ ins_num += 1
+ continue
+
+ if mnem in isa_pagenum_correction:
+ pagenum += isa_pagenum_correction[mnem]
+
+ tmp = read_pdf_page(pagenum + pageoffset, True)
+
+ #
+ # We are looking for a pattern like this:
+ #
+ # Trap Word Immediate D-form
+ # twi TO,RA,SI
+ # 3 TO RA SI
+ # 0 6 11 16 31
+ mnem_list = mnem.split('[', 1)
+ mnem_short = re.escape(mnem_list[0])
+ found = False
+ for n in range(len(tmp) - 1):
+ if mnem == tmp[n] or re.match(r"{} (FRT|FRS|FLM|FXM|CT|IH|XT|XS|BO|VR|S|WC|L|T|R|A|RA|RT|BF|BT|RB|target_addr).*".format(mnem_short), tmp[n]):
+ break
+ else:
+ print("!!!Error: could not find {} on page {}".format(mnem, pagenum + pageoffset), file = sys.stderr)
+ sys.exit(-1)
+
+ # Found the instruction(s), see now how many variants
+ for n1 in range(n, len(tmp)):
+ if re.match(r"\b0\b\s+[\d\s]+\b31\b", tmp[n1]):
+ #print(n1)
+ break
+ else:
+ print("!!!Error: could not find format for {} on page {}".format(mnem, pagenum + pageoffset), file = sys.stderr)
+ sys.exit(-1)
+
+ namesraw = re.sub(r'(/ )+', '/ ', tmp[n1 - 1]).upper()
+ namesraw = namesraw.replace('AXBXTX', "AX BX TX") # xxperm xxpermr xscmpeqdp xscmpgtdp xscmpgedp
+ namesraw = namesraw.replace('CXAXBX', "CX AX BX") # xxsel
+ namesraw = namesraw.replace('DMBXTX', "DM BX TX") # xvtstdcsp xvtstdcdp
+ namesraw = namesraw.replace('AXBX', "AX BX") # xscmpexpdp
+ namesraw = namesraw.replace('BXTX', "BX TX") # xxinsertw
+ names = namesraw.split()
+ numbers = [int(i) for i in tmp[n1].split()]
+
+ comment = ""
+ if "addpcis" == tmp[n][:7]:
+ # this one is just badly formatted
+ names = ["19", "RT", "D1", "D0", "2", "D2"]
+ numbers = [0, 6, 11, 16, 26, 31]
+ if "darn" == tmp[n][:4]:
+ # this one is just badly formatted
+ names = ["31", "RT", "///", "L", "///", "755", "/"]
+ numbers = [0, 6, 11, 14, 16, 21, 31]
+ if "sc " == tmp[n][:3]:
+ # this one is just badly formatted
+ names += ["/"]
+ elif len(numbers) > 5 and "RC" == names[4].upper() and numbers[4] == 21 and numbers[5] == 31:
+ # vcmpneb & co have missing bitfield offset right before the last one
+ comment += "fixup"
+ numbers = numbers[:5] + [22] + numbers[5:]
+
+ for i in range(n, n1 - 1):
+ predef = {}
+ com2 = comment
+ ext = re.match(r'^(\S+)\s+\S+\s+\(([^\)]+)\)$', tmp[i])
+ outp = '{'
+ if ext:
+ extbits = ext.group(2).strip()
+ # we have "(OE=1 Rc=0)" or "(if Rc=0)"
+ ee = re.sub(r'(\(|\)|if )', '', extbits, flags = re.I).split()
+ for e in ee:
+ e2 = e.split("=")
+ predef[e2[0].upper()] = int(e2[1])
+ outp += 'Name: "{}", '.format(ext.group(1))
+ else:
+ outp += 'Name: "{}", '.format(tmp[i].split()[0])
+
+ check_bitmap = 0
+ opcode = 0
+ opcodemask = 0
+ bits = {}
+ for j in range(len(names)):
+ start = numbers[j]
+ if j + 1 < len(numbers): # bc BO,BI,target_addr (AA=0 LK=0)
+ nn = numbers[j + 1] - numbers[j]
+ if j == len(names) - 1 and numbers[j + 1] == 31:
+ nn += 1
+ else:
+ if numbers[j] != 31:
+ nn = 32 - numbers[j]
+ else:
+ nn = 1
+
+ for n in range(start, start + nn):
+ bit = 1 << (31 - n)
+ if check_bitmap & bit:
+ print("!!!Error: bit {} overlap in {}".format(n, mnem), file = sys.stderr)
+ check_bitmap |= bit
+
+ if names[j].upper() in predef:
+ if nn != 1:
+ print("!!!Error: bitfield {} is expected to be a single bit in {}".format(names[j], mnem), file = sys.stderr)
+ sys.exit(-10)
+ opcodemask |= ppcmask(1, start, nn)
+ opcode |= ppcmask(predef[names[j].upper()], start, nn)
+ com2 += " {}:{}({})".format(predef[names[j].upper()], start, names[j])
+ continue
+ if re.match(r'\d+', names[j]):
+ opcodemask |= ppcmask(0xffffffff, start, nn)
+ opcode |= ppcmask(int(names[j]), start, nn)
+ com2 += ' {}:{}..{}'.format(names[j], start, start + nn - 1)
+ continue
+ if re.match(r'/+', names[j]):
+ opcodemask |= ppcmask(0xffffffff, start, nn)
+ com2 += ' 0:{}..{}(///)'.format(start, start + nn - 1)
+ continue
+ bits[names[j].upper()] = (start, nn)
+
+ if check_bitmap != 0xFFFFFFFF:
+ com2 += " 0x{:08X}".format(check_bitmap)
+ outp += "Opcode: 0x{:08x}, Mask: 0x{:08x}".format(opcode, opcodemask)
+ outp += add_mode_priv(mode, priv)
+ outp += ", Fields:map[string]ppc64.InsnBits{"
+ for k, v in sorted(bits.items()):
+ outp += '"{}": ppc64.InsnBits{{{}, {}}}, '.format(k, v[0], v[1])
+ outp += "}"
+ outp += "}, "
+ outp += " //{}".format(com2)
+ print(outp)
+ ins_num += 1
+
+ return ins_num
+
+ins_stat = {}
+fmt_map = {}
+
+print('// Code generated by {}. DO NOT EDIT.'.format(sys.argv[0]))
+print('')
+print('// +build !codeanalysis')
+print('')
+print('package isnsn')
+print('')
+print('import "github.com/google/syzkaller/pkg/ifuzz/powerpc"')
+print('')
+print('func init() {')
+print(' powerpc.Register(insns)')
+print('}')
+print('')
+print('var insns = []*powerpc.Insn{')
+
+ins_num = do_sorted_opcodes(fmt_map, ins_stat)
+
+print("}")
+
+print("Total {} instructions".format(ins_num), file = sys.stderr)
+ins_num = 0
+for k, v in sorted(ins_stat.items()):
+ print("\t{}: {} / {}".format(k if k else "-", v, len(fmt_map[k]) if k in fmt_map else "-"), file = sys.stderr)
+ ins_num += v
+print("Sorted {} instructions".format(ins_num/3), file = sys.stderr)
diff --git a/pkg/ifuzz/powerpc/generated/empty.go b/pkg/ifuzz/powerpc/generated/empty.go
new file mode 100644
index 000000000..1933cb1dd
--- /dev/null
+++ b/pkg/ifuzz/powerpc/generated/empty.go
@@ -0,0 +1,6 @@
+// Copyright 2020 syzkaller project authors. All rights reserved.
+// Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
+
+// To unbreak build with insns.go is excluded by build tags.
+
+package generated
diff --git a/pkg/ifuzz/powerpc/generated/insns.go b/pkg/ifuzz/powerpc/generated/insns.go
new file mode 100644
index 000000000..ba85eaae0
--- /dev/null
+++ b/pkg/ifuzz/powerpc/generated/insns.go
@@ -0,0 +1,1181 @@
+// Code generated by ./powerisa30_to_syz. DO NOT EDIT.
+
+// +build !codeanalysis
+
+package generated
+
+import "github.com/google/syzkaller/pkg/ifuzz/powerpc"
+
+func init() {
+ powerpc.Register(insns)
+}
+
+var insns = []*powerpc.Insn{
+ {Name: "tdi", Opcode: 0x08000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "SI": powerpc.InsnBits{16, 16}, "TO": powerpc.InsnBits{6, 5}}}, // 2:0..5
+ {Name: "twi", Opcode: 0x0c000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "SI": powerpc.InsnBits{16, 16}, "TO": powerpc.InsnBits{6, 5}}}, // 3:0..5
+ {Name: "vaddubm", Opcode: 0x10000000, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21..31
+ {Name: "vadduhm", Opcode: 0x10000040, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 64:21..31
+ {Name: "vadduwm", Opcode: 0x10000080, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 128:21..31
+ {Name: "vaddudm", Opcode: 0x100000c0, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 192:21..31
+ {Name: "vadduqm", Opcode: 0x10000100, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 256:21..31
+ {Name: "vaddcuq", Opcode: 0x10000140, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 320:21..31
+ {Name: "vaddcuw", Opcode: 0x10000180, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 384:21..31
+ {Name: "vaddubs", Opcode: 0x10000200, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 512:21..31
+ {Name: "vadduhs", Opcode: 0x10000240, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 576:21..31
+ {Name: "vadduws", Opcode: 0x10000280, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 640:21..31
+ {Name: "vaddsbs", Opcode: 0x10000300, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 768:21..31
+ {Name: "vaddshs", Opcode: 0x10000340, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 832:21..31
+ {Name: "vaddsws", Opcode: 0x10000380, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 896:21..31
+ {Name: "vsububm", Opcode: 0x10000400, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1024:21..31
+ {Name: "vsubuhm", Opcode: 0x10000440, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1088:21..31
+ {Name: "vsubuwm", Opcode: 0x10000480, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1152:21..31
+ {Name: "vsubudm", Opcode: 0x100004c0, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1216:21..31
+ {Name: "vsubuqm", Opcode: 0x10000500, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1280:21..31
+ {Name: "vsubcuq", Opcode: 0x10000540, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1344:21..31
+ {Name: "vsubcuw", Opcode: 0x10000580, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1408:21..31
+ {Name: "vsububs", Opcode: 0x10000600, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1536:21..31
+ {Name: "vsubuhs", Opcode: 0x10000640, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1600:21..31
+ {Name: "vsubuws", Opcode: 0x10000680, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1664:21..31
+ {Name: "vsubsbs", Opcode: 0x10000700, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1792:21..31
+ {Name: "vsubshs", Opcode: 0x10000740, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1856:21..31
+ {Name: "vsubsws", Opcode: 0x10000780, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1920:21..31
+ {Name: "vmul10cuq", Opcode: 0x10000001, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:16..20(///) 1:21..31
+ {Name: "vmul10ecuq", Opcode: 0x10000041, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 65:21..31
+ {Name: "vmul10uq", Opcode: 0x10000201, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:16..20(///) 513:21..31
+ {Name: "vmul10euq", Opcode: 0x10000241, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 577:21..31
+ {Name: "bcdcpsgn.", Opcode: 0x10000341, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 833:21..31
+ {Name: "bcdadd.", Opcode: 0x10000401, Mask: 0xfc0005ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 1:23..31
+ {Name: "bcdsub.", Opcode: 0x10000441, Mask: 0xfc0005ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 65:23..31
+ {Name: "bcdus.", Opcode: 0x10000481, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 0:22..22(///) 129:23..31
+ {Name: "bcds.", Opcode: 0x100004c1, Mask: 0xfc0005ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 193:23..31
+ {Name: "bcdtrunc.", Opcode: 0x10000501, Mask: 0xfc0005ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 257:23..31
+ {Name: "bcdutrunc.", Opcode: 0x10000541, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 0:22..22(///) 321:23..31
+ {Name: "bcdctsq.", Opcode: 0x10000581, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15 1:21..21 0:22..22(///) 385:23..31
+ {Name: "bcdcfsq.", Opcode: 0x10020581, Mask: 0xfc1f05ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 2:11..15 1:21..21 385:23..31
+ {Name: "bcdctz.", Opcode: 0x10040581, Mask: 0xfc1f05ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 4:11..15 1:21..21 385:23..31
+ {Name: "bcdctn.", Opcode: 0x10050581, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 5:11..15 1:21..21 0:22..22(///) 385:23..31
+ {Name: "bcdcfz.", Opcode: 0x10060581, Mask: 0xfc1f05ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 6:11..15 1:21..21 385:23..31
+ {Name: "bcdcfn.", Opcode: 0x10070581, Mask: 0xfc1f05ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 7:11..15 1:21..21 385:23..31
+ {Name: "bcdsetsgn.", Opcode: 0x101f0581, Mask: 0xfc1f05ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 31:11..15 1:21..21 385:23..31
+ {Name: "bcdsr.", Opcode: 0x100005c1, Mask: 0xfc0005ff, Fields: map[string]powerpc.InsnBits{"PS": powerpc.InsnBits{22, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21..21 449:23..31
+ {Name: "vmaxub", Opcode: 0x10000002, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 2:21..31
+ {Name: "vmaxuh", Opcode: 0x10000042, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 66:21..31
+ {Name: "vmaxuw", Opcode: 0x10000082, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 130:21..31
+ {Name: "vmaxud", Opcode: 0x100000c2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 194:21..31
+ {Name: "vmaxsb", Opcode: 0x10000102, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 258:21..31
+ {Name: "vmaxsh", Opcode: 0x10000142, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 322:21..31
+ {Name: "vmaxsw", Opcode: 0x10000182, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 386:21..31
+ {Name: "vmaxsd", Opcode: 0x100001c2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 450:21..31
+ {Name: "vminub", Opcode: 0x10000202, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 514:21..31
+ {Name: "vminuh", Opcode: 0x10000242, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 578:21..31
+ {Name: "vminuw", Opcode: 0x10000282, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 642:21..31
+ {Name: "vminud", Opcode: 0x100002c2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 706:21..31
+ {Name: "vminsb", Opcode: 0x10000302, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 770:21..31
+ {Name: "vminsh", Opcode: 0x10000342, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 834:21..31
+ {Name: "vminsw", Opcode: 0x10000382, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 898:21..31
+ {Name: "vminsd", Opcode: 0x100003c2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 962:21..31
+ {Name: "vavgub", Opcode: 0x10000402, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1026:21..31
+ {Name: "vavguh", Opcode: 0x10000442, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1090:21..31
+ {Name: "vavguw", Opcode: 0x10000482, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1154:21..31
+ {Name: "vavgsb", Opcode: 0x10000502, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1282:21..31
+ {Name: "vavgsh", Opcode: 0x10000542, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1346:21..31
+ {Name: "vavgsw", Opcode: 0x10000582, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1410:21..31
+ {Name: "vclzlsbb", Opcode: 0x10000602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 0:11..15 1538:21..31
+ {Name: "vctzlsbb", Opcode: 0x10010602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1:11..15 1538:21..31
+ {Name: "vnegw", Opcode: 0x10060602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 6:11..15 1538:21..31
+ {Name: "vnegd", Opcode: 0x10070602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 7:11..15 1538:21..31
+ {Name: "vprtybw", Opcode: 0x10080602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 8:11..15 1538:21..31
+ {Name: "vprtybd", Opcode: 0x10090602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 9:11..15 1538:21..31
+ {Name: "vprtybq", Opcode: 0x100a0602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 10:11..15 1538:21..31
+ {Name: "vextsb2w", Opcode: 0x10100602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 16:11..15 1538:21..31
+ {Name: "vextsh2w", Opcode: 0x10110602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 17:11..15 1538:21..31
+ {Name: "vextsb2d", Opcode: 0x10180602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 24:11..15 1538:21..31
+ {Name: "vextsh2d", Opcode: 0x10190602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 25:11..15 1538:21..31
+ {Name: "vextsw2d", Opcode: 0x101a0602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 26:11..15 1538:21..31
+ {Name: "vctzb", Opcode: 0x101c0602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 28:11..15 1538:21..31
+ {Name: "vctzh", Opcode: 0x101d0602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 29:11..15 1538:21..31
+ {Name: "vctzw", Opcode: 0x101e0602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 30:11..15 1538:21..31
+ {Name: "vctzd", Opcode: 0x101f0602, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 31:11..15 1538:21..31
+ {Name: "vshasigmaw", Opcode: 0x10000682, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"SIX": powerpc.InsnBits{17, 4}, "ST": powerpc.InsnBits{16, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1666:21..31
+ {Name: "vshasigmad", Opcode: 0x100006c2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"SIX": powerpc.InsnBits{17, 4}, "ST": powerpc.InsnBits{16, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1730:21..31
+ {Name: "vclzb", Opcode: 0x10000702, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1794:21..31
+ {Name: "vclzh", Opcode: 0x10000742, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1858:21..31
+ {Name: "vclzw", Opcode: 0x10000782, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1922:21..31
+ {Name: "vclzd", Opcode: 0x100007c2, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1986:21..31
+ {Name: "vabsdub", Opcode: 0x10000403, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1027:21..31
+ {Name: "vabsduh", Opcode: 0x10000443, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1091:21..31
+ {Name: "vabsduw", Opcode: 0x10000483, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1155:21..31
+ {Name: "vpopcntb", Opcode: 0x10000703, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1795:21..31
+ {Name: "vpopcnth", Opcode: 0x10000743, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1859:21..31
+ {Name: "vpopcntw", Opcode: 0x10000783, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1923:21..31
+ {Name: "vpopcntd", Opcode: 0x100007c3, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1987:21..31
+ {Name: "vrlb", Opcode: 0x10000004, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 4:21..31
+ {Name: "vrlh", Opcode: 0x10000044, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 68:21..31
+ {Name: "vrlw", Opcode: 0x10000084, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 132:21..31
+ {Name: "vrld", Opcode: 0x100000c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 196:21..31
+ {Name: "vslb", Opcode: 0x10000104, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 260:21..31
+ {Name: "vslh", Opcode: 0x10000144, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 324:21..31
+ {Name: "vslw", Opcode: 0x10000184, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 388:21..31
+ {Name: "vsl", Opcode: 0x100001c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 452:21..31
+ {Name: "vsrb", Opcode: 0x10000204, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 516:21..31
+ {Name: "vsrh", Opcode: 0x10000244, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 580:21..31
+ {Name: "vsrw", Opcode: 0x10000284, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 644:21..31
+ {Name: "vsr", Opcode: 0x100002c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 708:21..31
+ {Name: "vsrab", Opcode: 0x10000304, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 772:21..31
+ {Name: "vsrah", Opcode: 0x10000344, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 836:21..31
+ {Name: "vsraw", Opcode: 0x10000384, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 900:21..31
+ {Name: "vsrad", Opcode: 0x100003c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 964:21..31
+ {Name: "vand", Opcode: 0x10000404, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1028:21..31
+ {Name: "vandc", Opcode: 0x10000444, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1092:21..31
+ {Name: "vor", Opcode: 0x10000484, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1156:21..31
+ {Name: "vxor", Opcode: 0x100004c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1220:21..31
+ {Name: "vnor", Opcode: 0x10000504, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1284:21..31
+ {Name: "vorc", Opcode: 0x10000544, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1348:21..31
+ {Name: "vnand", Opcode: 0x10000584, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1412:21..31
+ {Name: "vsld", Opcode: 0x100005c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1476:21..31
+ {Name: "mfvscr", Opcode: 0x10000604, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 0:16..20(///) 1540:21..31
+ {Name: "mtvscr", Opcode: 0x10000644, Mask: 0xffff07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 0:6..10(///) 0:11..15(///) 1604:21..31
+ {Name: "veqv", Opcode: 0x10000684, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1668:21..31
+ {Name: "vsrd", Opcode: 0x100006c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1732:21..31
+ {Name: "vsrv", Opcode: 0x10000704, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1796:21..31
+ {Name: "vslv", Opcode: 0x10000744, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1860:21..31
+ {Name: "vrlwmi", Opcode: 0x10000085, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 133:21..31
+ {Name: "vrldmi", Opcode: 0x100000c5, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 197:21..31
+ {Name: "vrlwnm", Opcode: 0x10000185, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 389:21..31
+ {Name: "vrldnm", Opcode: 0x100001c5, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 453:21..31
+ {Name: "vcmpequb", Opcode: 0x10000006, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 6:22..31
+ {Name: "vcmpequb.", Opcode: 0x10000406, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 6:22..31
+ {Name: "vcmpequh", Opcode: 0x10000046, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 70:22..31
+ {Name: "vcmpequh.", Opcode: 0x10000446, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 70:22..31
+ {Name: "vcmpequw", Opcode: 0x10000086, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 134:22..31
+ {Name: "vcmpequw.", Opcode: 0x10000486, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 134:22..31
+ {Name: "vcmpeqfp", Opcode: 0x100000c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 198:22..31
+ {Name: "vcmpeqfp.", Opcode: 0x100004c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 198:22..31
+ {Name: "vcmpgefp", Opcode: 0x100001c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 454:22..31
+ {Name: "vcmpgefp.", Opcode: 0x100005c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 454:22..31
+ {Name: "vcmpgtub", Opcode: 0x10000206, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 518:22..31
+ {Name: "vcmpgtub.", Opcode: 0x10000606, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 518:22..31
+ {Name: "vcmpgtuh", Opcode: 0x10000246, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 582:22..31
+ {Name: "vcmpgtuh.", Opcode: 0x10000646, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 582:22..31
+ {Name: "vcmpgtuw", Opcode: 0x10000286, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 646:22..31
+ {Name: "vcmpgtuw.", Opcode: 0x10000686, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 646:22..31
+ {Name: "vcmpgtfp", Opcode: 0x100002c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 710:22..31
+ {Name: "vcmpgtfp.", Opcode: 0x100006c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 710:22..31
+ {Name: "vcmpgtsb", Opcode: 0x10000306, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 774:22..31
+ {Name: "vcmpgtsb.", Opcode: 0x10000706, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 774:22..31
+ {Name: "vcmpgtsh", Opcode: 0x10000346, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 838:22..31
+ {Name: "vcmpgtsh.", Opcode: 0x10000746, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 838:22..31
+ {Name: "vcmpgtsw", Opcode: 0x10000386, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 902:22..31
+ {Name: "vcmpgtsw.", Opcode: 0x10000786, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 902:22..31
+ {Name: "vcmpbfp", Opcode: 0x100003c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 966:22..31
+ {Name: "vcmpbfp.", Opcode: 0x100007c6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 966:22..31
+ {Name: "vcmpneb", Opcode: 0x10000007, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 0:21(RC) 7:22..31
+ {Name: "vcmpneb.", Opcode: 0x10000407, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 1:21(RC) 7:22..31
+ {Name: "vcmpneh", Opcode: 0x10000047, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 0:21(RC) 71:22..31
+ {Name: "vcmpneh.", Opcode: 0x10000447, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 1:21(RC) 71:22..31
+ {Name: "vcmpnew", Opcode: 0x10000087, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 0:21(RC) 135:22..31
+ {Name: "vcmpnew.", Opcode: 0x10000487, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 1:21(RC) 135:22..31
+ {Name: "vcmpequd", Opcode: 0x100000c7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 199:22..31
+ {Name: "vcmpequd.", Opcode: 0x100004c7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 199:22..31
+ {Name: "vcmpnezb", Opcode: 0x10000107, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 0:21(RC) 263:22..31
+ {Name: "vcmpnezb.", Opcode: 0x10000507, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 1:21(RC) 263:22..31
+ {Name: "vcmpnezh", Opcode: 0x10000147, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 0:21(RC) 327:22..31
+ {Name: "vcmpnezh.", Opcode: 0x10000547, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 1:21(RC) 327:22..31
+ {Name: "vcmpnezw", Opcode: 0x10000187, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 0:21(RC) 391:22..31
+ {Name: "vcmpnezw.", Opcode: 0x10000587, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, //fixup 4:0..5 1:21(RC) 391:22..31
+ {Name: "vcmpgtud", Opcode: 0x100002c7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 711:22..31
+ {Name: "vcmpgtud.", Opcode: 0x100006c7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 711:22..31
+ {Name: "vcmpgtsd", Opcode: 0x100003c7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21(RC) 967:22..31
+ {Name: "vcmpgtsd.", Opcode: 0x100007c7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1:21(RC) 967:22..31
+ {Name: "vmuloub", Opcode: 0x10000008, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 8:21..31
+ {Name: "vmulouh", Opcode: 0x10000048, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 72:21..31
+ {Name: "vmulouw", Opcode: 0x10000088, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 136:21..31
+ {Name: "vmulosb", Opcode: 0x10000108, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 264:21..31
+ {Name: "vmulosh", Opcode: 0x10000148, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 328:21..31
+ {Name: "vmulosw", Opcode: 0x10000188, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 392:21..31
+ {Name: "vmuleub", Opcode: 0x10000208, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 520:21..31
+ {Name: "vmuleuh", Opcode: 0x10000248, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 584:21..31
+ {Name: "vmuleuw", Opcode: 0x10000288, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 648:21..31
+ {Name: "vmulesb", Opcode: 0x10000308, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 776:21..31
+ {Name: "vmulesh", Opcode: 0x10000348, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 840:21..31
+ {Name: "vmulesw", Opcode: 0x10000388, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 904:21..31
+ {Name: "vpmsumb", Opcode: 0x10000408, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1032:21..31
+ {Name: "vpmsumh", Opcode: 0x10000448, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1096:21..31
+ {Name: "vpmsumw", Opcode: 0x10000488, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1160:21..31
+ {Name: "vpmsumd", Opcode: 0x100004c8, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1224:21..31
+ {Name: "vcipher", Opcode: 0x10000508, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1288:21..31
+ {Name: "vncipher", Opcode: 0x10000548, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1352:21..31
+ {Name: "vsbox", Opcode: 0x100005c8, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:16..20(///) 1480:21..31
+ {Name: "vsum4ubs", Opcode: 0x10000608, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1544:21..31
+ {Name: "vsum4shs", Opcode: 0x10000648, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1608:21..31
+ {Name: "vsum2sws", Opcode: 0x10000688, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1672:21..31
+ {Name: "vsum4sbs", Opcode: 0x10000708, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1800:21..31
+ {Name: "vsumsws", Opcode: 0x10000788, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1928:21..31
+ {Name: "vmuluwm", Opcode: 0x10000089, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 137:21..31
+ {Name: "vcipherlast", Opcode: 0x10000509, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1289:21..31
+ {Name: "vncipherlast", Opcode: 0x10000549, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1353:21..31
+ {Name: "vaddfp", Opcode: 0x1000000a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 10:21..31
+ {Name: "vsubfp", Opcode: 0x1000004a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 74:21..31
+ {Name: "vrefp", Opcode: 0x1000010a, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 266:21..31
+ {Name: "vrsqrtefp", Opcode: 0x1000014a, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 330:21..31
+ {Name: "vexptefp", Opcode: 0x1000018a, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 394:21..31
+ {Name: "vlogefp", Opcode: 0x100001ca, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 458:21..31
+ {Name: "vrfin", Opcode: 0x1000020a, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 522:21..31
+ {Name: "vrfiz", Opcode: 0x1000024a, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 586:21..31
+ {Name: "vrfip", Opcode: 0x1000028a, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 650:21..31
+ {Name: "vrfim", Opcode: 0x100002ca, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 714:21..31
+ {Name: "vcfux", Opcode: 0x1000030a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 778:21..31
+ {Name: "vcfsx", Opcode: 0x1000034a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 842:21..31
+ {Name: "vctuxs", Opcode: 0x1000038a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 906:21..31
+ {Name: "vctsxs", Opcode: 0x100003ca, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 970:21..31
+ {Name: "vmaxfp", Opcode: 0x1000040a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1034:21..31
+ {Name: "vminfp", Opcode: 0x1000044a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1098:21..31
+ {Name: "vmrghb", Opcode: 0x1000000c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 12:21..31
+ {Name: "vmrghh", Opcode: 0x1000004c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 76:21..31
+ {Name: "vmrghw", Opcode: 0x1000008c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 140:21..31
+ {Name: "vmrglb", Opcode: 0x1000010c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 268:21..31
+ {Name: "vmrglh", Opcode: 0x1000014c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 332:21..31
+ {Name: "vmrglw", Opcode: 0x1000018c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 396:21..31
+ {Name: "vspltb", Opcode: 0x1000020c, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 524:21..31
+ {Name: "vsplth", Opcode: 0x1000024c, Mask: 0xfc1807ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{13, 3}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..12(///) 588:21..31
+ {Name: "vspltw", Opcode: 0x1000028c, Mask: 0xfc1c07ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{14, 2}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..13(///) 652:21..31
+ {Name: "vspltisb", Opcode: 0x1000030c, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"SIM": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:16..20(///) 780:21..31
+ {Name: "vspltish", Opcode: 0x1000034c, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"SIM": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:16..20(///) 844:21..31
+ {Name: "vspltisw", Opcode: 0x1000038c, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"SIM": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:16..20(///) 908:21..31
+ {Name: "vslo", Opcode: 0x1000040c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1036:21..31
+ {Name: "vsro", Opcode: 0x1000044c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1100:21..31
+ {Name: "vgbbd", Opcode: 0x1000050c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1292:21..31
+ {Name: "vbpermq", Opcode: 0x1000054c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1356:21..31
+ {Name: "vbpermd", Opcode: 0x100005cc, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1484:21..31
+ {Name: "vmrgow", Opcode: 0x1000068c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1676:21..31
+ {Name: "vmrgew", Opcode: 0x1000078c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1932:21..31
+ {Name: "vextractub", Opcode: 0x1000020d, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 525:21..31
+ {Name: "vextractuh", Opcode: 0x1000024d, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 589:21..31
+ {Name: "vextractuw", Opcode: 0x1000028d, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 653:21..31
+ {Name: "vextractd", Opcode: 0x100002cd, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 717:21..31
+ {Name: "vinsertb", Opcode: 0x1000030d, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 781:21..31
+ {Name: "vinserth", Opcode: 0x1000034d, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 845:21..31
+ {Name: "vinsertw", Opcode: 0x1000038d, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 909:21..31
+ {Name: "vinsertd", Opcode: 0x100003cd, Mask: 0xfc1007ff, Fields: map[string]powerpc.InsnBits{"UIM": powerpc.InsnBits{12, 4}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..11(///) 973:21..31
+ {Name: "vextublx", Opcode: 0x1000060d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1549:21..31
+ {Name: "vextuhlx", Opcode: 0x1000064d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1613:21..31
+ {Name: "vextuwlx", Opcode: 0x1000068d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1677:21..31
+ {Name: "vextubrx", Opcode: 0x1000070d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1805:21..31
+ {Name: "vextuhrx", Opcode: 0x1000074d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1869:21..31
+ {Name: "vextuwrx", Opcode: 0x1000078d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 4:0..5 1933:21..31
+ {Name: "vpkuhum", Opcode: 0x1000000e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 14:21..31
+ {Name: "vpkuwum", Opcode: 0x1000004e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 78:21..31
+ {Name: "vpkuhus", Opcode: 0x1000008e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 142:21..31
+ {Name: "vpkuwus", Opcode: 0x100000ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 206:21..31
+ {Name: "vpkshus", Opcode: 0x1000010e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 270:21..31
+ {Name: "vpkswus", Opcode: 0x1000014e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 334:21..31
+ {Name: "vpkshss", Opcode: 0x1000018e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 398:21..31
+ {Name: "vpkswss", Opcode: 0x100001ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 462:21..31
+ {Name: "vupkhsb", Opcode: 0x1000020e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 526:21..31
+ {Name: "vupkhsh", Opcode: 0x1000024e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 590:21..31
+ {Name: "vupklsb", Opcode: 0x1000028e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 654:21..31
+ {Name: "vupklsh", Opcode: 0x100002ce, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 718:21..31
+ {Name: "vpkpx", Opcode: 0x1000030e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 782:21..31
+ {Name: "vupkhpx", Opcode: 0x1000034e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 846:21..31
+ {Name: "vupklpx", Opcode: 0x100003ce, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 974:21..31
+ {Name: "vpkudum", Opcode: 0x1000044e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1102:21..31
+ {Name: "vpkudus", Opcode: 0x100004ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1230:21..31
+ {Name: "vpksdus", Opcode: 0x1000054e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1358:21..31
+ {Name: "vpksdss", Opcode: 0x100005ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 1486:21..31
+ {Name: "vupkhsw", Opcode: 0x1000064e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1614:21..31
+ {Name: "vupklsw", Opcode: 0x100006ce, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:11..15(///) 1742:21..31
+ {Name: "vmhaddshs", Opcode: 0x10000020, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 32:26..31
+ {Name: "vmhraddshs", Opcode: 0x10000021, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 33:26..31
+ {Name: "vmladduhm", Opcode: 0x10000022, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 34:26..31
+ {Name: "vmsumudm", Opcode: 0x10000023, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 35:26..31
+ {Name: "vmsumubm", Opcode: 0x10000024, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 36:26..31
+ {Name: "vmsummbm", Opcode: 0x10000025, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 37:26..31
+ {Name: "vmsumuhm", Opcode: 0x10000026, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 38:26..31
+ {Name: "vmsumuhs", Opcode: 0x10000027, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 39:26..31
+ {Name: "vmsumshm", Opcode: 0x10000028, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 40:26..31
+ {Name: "vmsumshs", Opcode: 0x10000029, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 41:26..31
+ {Name: "vsel", Opcode: 0x1000002a, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 42:26..31
+ {Name: "vperm", Opcode: 0x1000002b, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 43:26..31
+ {Name: "vsldoi", Opcode: 0x1000002c, Mask: 0xfc00043f, Fields: map[string]powerpc.InsnBits{"SHB": powerpc.InsnBits{22, 4}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 0:21..21(///) 44:26..31
+ {Name: "vpermxor", Opcode: 0x1000002d, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 45:26..31
+ {Name: "vmaddfp", Opcode: 0x1000002e, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 46:26..31
+ {Name: "vnmsubfp", Opcode: 0x1000002f, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 47:26..31
+ {Name: "maddhd", Opcode: 0x10000030, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RC": powerpc.InsnBits{21, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 4:0..5 48:26..31
+ {Name: "maddhdu", Opcode: 0x10000031, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RC": powerpc.InsnBits{21, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 4:0..5 49:26..31
+ {Name: "maddld", Opcode: 0x10000033, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RC": powerpc.InsnBits{21, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 4:0..5 51:26..31
+ {Name: "vpermr", Opcode: 0x1000003b, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 59:26..31
+ {Name: "vaddeuqm", Opcode: 0x1000003c, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 60:26..31
+ {Name: "vaddecuq", Opcode: 0x1000003d, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 61:26..31
+ {Name: "vsubeuqm", Opcode: 0x1000003e, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 62:26..31
+ {Name: "vsubecuq", Opcode: 0x1000003f, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRC": powerpc.InsnBits{21, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 4:0..5 63:26..31
+ {Name: "mulli", Opcode: 0x1c000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 7:0..5
+ {Name: "subfic", Opcode: 0x20000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 8:0..5
+ {Name: "cmpli", Opcode: 0x28000000, Mask: 0xfc400000, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "L": powerpc.InsnBits{10, 1}, "RA": powerpc.InsnBits{11, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 10:0..5 0:9..9(///)
+ {Name: "cmpi", Opcode: 0x2c000000, Mask: 0xfc400000, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "L": powerpc.InsnBits{10, 1}, "RA": powerpc.InsnBits{11, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 11:0..5 0:9..9(///)
+ {Name: "addic", Opcode: 0x30000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 12:0..5
+ {Name: "addic.", Opcode: 0x34000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 13:0..5
+ {Name: "addi", Opcode: 0x38000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 14:0..5
+ {Name: "addis", Opcode: 0x3c000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}, "SI": powerpc.InsnBits{16, 16}}}, // 15:0..5
+ {Name: "bc", Opcode: 0x40000000, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"BD": powerpc.InsnBits{16, 14}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 16:0..5 0:30(AA) 0:31(LK)
+ {Name: "bca", Opcode: 0x40000002, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"BD": powerpc.InsnBits{16, 14}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 16:0..5 1:30(AA) 0:31(LK)
+ {Name: "bcl", Opcode: 0x40000001, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"BD": powerpc.InsnBits{16, 14}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 16:0..5 0:30(AA) 1:31(LK)
+ {Name: "bcla", Opcode: 0x40000003, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"BD": powerpc.InsnBits{16, 14}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 16:0..5 1:30(AA) 1:31(LK)
+ {Name: "scv", Opcode: 0x44000001, Mask: 0xfffff01f, Fields: map[string]powerpc.InsnBits{"LEV": powerpc.InsnBits{20, 7}}}, // 17:0..5 0:6..10(///) 0:11..15(///) 0:16..19(///) 0:27..29(///) 0:30..30 1:31..31
+ {Name: "sc", Opcode: 0x44000002, Mask: 0xfffff01f, Fields: map[string]powerpc.InsnBits{"LEV": powerpc.InsnBits{20, 7}}}, // 17:0..5 0:6..10(///) 0:11..15(///) 0:16..19(///) 0:27..29(///) 1:30..30 0:31..31(///)
+ {Name: "b", Opcode: 0x48000000, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"LI": powerpc.InsnBits{6, 24}}}, // 18:0..5 0:30(AA) 0:31(LK)
+ {Name: "ba", Opcode: 0x48000002, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"LI": powerpc.InsnBits{6, 24}}}, // 18:0..5 1:30(AA) 0:31(LK)
+ {Name: "bl", Opcode: 0x48000001, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"LI": powerpc.InsnBits{6, 24}}}, // 18:0..5 0:30(AA) 1:31(LK)
+ {Name: "bla", Opcode: 0x48000003, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"LI": powerpc.InsnBits{6, 24}}}, // 18:0..5 1:30(AA) 1:31(LK)
+ {Name: "mcrf", Opcode: 0x4c000000, Mask: 0xfc63ffff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "BFA": powerpc.InsnBits{11, 3}}}, // 19:0..5 0:9..10(///) 0:14..15(///) 0:16..20(///) 0:21..30 0:31..31(///)
+ {Name: "crnor", Opcode: 0x4c000042, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 33:21..30 0:31..31(///)
+ {Name: "crandc", Opcode: 0x4c000102, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 129:21..30 0:31..31(///)
+ {Name: "crxor", Opcode: 0x4c000182, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 193:21..30 0:31..31(///)
+ {Name: "crnand", Opcode: 0x4c0001c2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 225:21..30 0:31..31(///)
+ {Name: "crand", Opcode: 0x4c000202, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 257:21..30 0:31..31(///)
+ {Name: "creqv", Opcode: 0x4c000242, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 289:21..30 0:31..31(///)
+ {Name: "crorc", Opcode: 0x4c000342, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 417:21..30 0:31..31(///)
+ {Name: "cror", Opcode: 0x4c000382, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BA": powerpc.InsnBits{11, 5}, "BB": powerpc.InsnBits{16, 5}, "BT": powerpc.InsnBits{6, 5}}}, // 19:0..5 449:21..30 0:31..31(///)
+ {Name: "bclr", Opcode: 0x4c000020, Mask: 0xfc00e7ff, Fields: map[string]powerpc.InsnBits{"BH": powerpc.InsnBits{19, 2}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 19:0..5 0:16..18(///) 16:21..30 0:31(LK)
+ {Name: "bclrl", Opcode: 0x4c000021, Mask: 0xfc00e7ff, Fields: map[string]powerpc.InsnBits{"BH": powerpc.InsnBits{19, 2}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 19:0..5 0:16..18(///) 16:21..30 1:31(LK)
+ {Name: "bcctr", Opcode: 0x4c000420, Mask: 0xfc00e7ff, Fields: map[string]powerpc.InsnBits{"BH": powerpc.InsnBits{19, 2}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 19:0..5 0:16..18(///) 528:21..30 0:31(LK)
+ {Name: "bcctrl", Opcode: 0x4c000421, Mask: 0xfc00e7ff, Fields: map[string]powerpc.InsnBits{"BH": powerpc.InsnBits{19, 2}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 19:0..5 0:16..18(///) 528:21..30 1:31(LK)
+ {Name: "bctar", Opcode: 0x4c000460, Mask: 0xfc00e7ff, Fields: map[string]powerpc.InsnBits{"BH": powerpc.InsnBits{19, 2}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 19:0..5 0:16..18(///) 560:21..30 0:31(LK)
+ {Name: "bctarl", Opcode: 0x4c000461, Mask: 0xfc00e7ff, Fields: map[string]powerpc.InsnBits{"BH": powerpc.InsnBits{19, 2}, "BI": powerpc.InsnBits{11, 5}, "BO": powerpc.InsnBits{6, 5}}}, // 19:0..5 0:16..18(///) 560:21..30 1:31(LK)
+ {Name: "rfid", Opcode: 0x4c000024, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 19:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 18:21..30 0:31..31(///)
+ {Name: "rfscv", Opcode: 0x4c0000a4, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 19:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 82:21..30 0:31..31(///)
+ {Name: "rfebb", Opcode: 0x4c000124, Mask: 0xfffff7ff, Fields: map[string]powerpc.InsnBits{"S": powerpc.InsnBits{20, 1}}}, // 19:0..5 0:6..10(///) 0:11..15(///) 0:16..19(///) 146:21..30 0:31..31(///)
+ {Name: "hrfid", Opcode: 0x4c000224, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 19:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 274:21..30 0:31..31(///)
+ {Name: "stop", Opcode: 0x4c000172, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 19:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 370:21..31
+ {Name: "isync", Opcode: 0x4c00012c, Mask: 0xffffffff, Fields: map[string]powerpc.InsnBits{}}, // 19:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 150:21..30 0:31..31(///)
+ {Name: "rlwimi", Opcode: 0x50000000, Mask: 0xfc000001, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 5}, "ME": powerpc.InsnBits{26, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 5}}}, // 20:0..5 0:31(RC)
+ {Name: "rlwimi.", Opcode: 0x50000001, Mask: 0xfc000001, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 5}, "ME": powerpc.InsnBits{26, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 5}}}, // 20:0..5 1:31(RC)
+ {Name: "rlwinm", Opcode: 0x54000000, Mask: 0xfc000001, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 5}, "ME": powerpc.InsnBits{26, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 5}}}, // 21:0..5 0:31(RC)
+ {Name: "rlwinm.", Opcode: 0x54000001, Mask: 0xfc000001, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 5}, "ME": powerpc.InsnBits{26, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 5}}}, // 21:0..5 1:31(RC)
+ {Name: "rlwnm", Opcode: 0x5c000000, Mask: 0xfc000001, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 5}, "ME": powerpc.InsnBits{26, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 23:0..5 0:31(RC)
+ {Name: "rlwnm.", Opcode: 0x5c000001, Mask: 0xfc000001, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 5}, "ME": powerpc.InsnBits{26, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 23:0..5 1:31(RC)
+ {Name: "ori", Opcode: 0x60000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 24:0..5
+ {Name: "oris", Opcode: 0x64000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 25:0..5
+ {Name: "xnop", Opcode: 0x68000000, Mask: 0xFFFFFFFF},
+ {Name: "xori", Opcode: 0x68000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 26:0..5
+ {Name: "xoris", Opcode: 0x6c000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 27:0..5
+ {Name: "andi.", Opcode: 0x70000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 28:0..5
+ {Name: "andis.", Opcode: 0x74000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "UI": powerpc.InsnBits{16, 16}}}, // 29:0..5
+ {Name: "rldicl", Opcode: 0x78000000, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 0:27..29 0:31(RC)
+ {Name: "rldicl.", Opcode: 0x78000001, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 0:27..29 1:31(RC)
+ {Name: "rldicr", Opcode: 0x78000004, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"ME": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 1:27..29 0:31(RC)
+ {Name: "rldicr.", Opcode: 0x78000005, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"ME": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 1:27..29 1:31(RC)
+ {Name: "rldic", Opcode: 0x78000008, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 2:27..29 0:31(RC)
+ {Name: "rldic.", Opcode: 0x78000009, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 2:27..29 1:31(RC)
+ {Name: "rldimi", Opcode: 0x7800000c, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 3:27..29 0:31(RC)
+ {Name: "rldimi.", Opcode: 0x7800000d, Mask: 0xfc00001d, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 30:0..5 3:27..29 1:31(RC)
+ {Name: "rldcl", Opcode: 0x78000010, Mask: 0xfc00001f, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 30:0..5 8:27..30 0:31(RC)
+ {Name: "rldcl.", Opcode: 0x78000011, Mask: 0xfc00001f, Fields: map[string]powerpc.InsnBits{"MB": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 30:0..5 8:27..30 1:31(RC)
+ {Name: "rldcr", Opcode: 0x78000012, Mask: 0xfc00001f, Fields: map[string]powerpc.InsnBits{"ME": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 30:0..5 9:27..30 0:31(RC)
+ {Name: "rldcr.", Opcode: 0x78000013, Mask: 0xfc00001f, Fields: map[string]powerpc.InsnBits{"ME": powerpc.InsnBits{21, 6}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 30:0..5 9:27..30 1:31(RC)
+ {Name: "cmp", Opcode: 0x7c000000, Mask: 0xfc4007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "L": powerpc.InsnBits{10, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:9..9(///) 0:21..30 0:31..31(///)
+ {Name: "cmpl", Opcode: 0x7c000040, Mask: 0xfc4007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "L": powerpc.InsnBits{10, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:9..9(///) 32:21..30 0:31..31(///)
+ {Name: "setb", Opcode: 0x7c000100, Mask: 0xfc03ffff, Fields: map[string]powerpc.InsnBits{"BFA": powerpc.InsnBits{11, 3}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:14..15(///) 0:16..20(///) 128:21..30 0:31..31(///)
+ {Name: "cmprb", Opcode: 0x7c000000, Mask: 0xfc40ffff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "RA": powerpc.InsnBits{10, 1}, "RB": powerpc.InsnBits{11, 5}}}, // 31:0..5 0:9..9(///) 192:16..20 0:21..31(///)
+ {Name: "cmpeqb", Opcode: 0x7c0001c0, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:9..10(///) 224:21..30 0:31..31(///)
+ {Name: "mcrxrx", Opcode: 0x7c000480, Mask: 0xfc7fffff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}}}, // 31:0..5 0:9..10(///) 0:11..15(///) 0:16..20(///) 576:21..30 0:31..31(///)
+ {Name: "tw", Opcode: 0x7c000008, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "TO": powerpc.InsnBits{6, 5}}}, // 31:0..5 4:21..30 0:31..31(///)
+ {Name: "td", Opcode: 0x7c000088, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "TO": powerpc.InsnBits{6, 5}}}, // 31:0..5 68:21..30 0:31..31(///)
+ {Name: "lvsl", Opcode: 0x7c00000c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 6:21..30 0:31..31(///)
+ {Name: "lvsr", Opcode: 0x7c00004c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 38:21..30 0:31..31(///)
+ {Name: "lwat", Opcode: 0x7c00048c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FC": powerpc.InsnBits{16, 5}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 582:21..30 0:31..31(///)
+ {Name: "ldat", Opcode: 0x7c0004cc, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FC": powerpc.InsnBits{16, 5}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 614:21..30 0:31..31(///)
+ {Name: "stwat", Opcode: 0x7c00058c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FC": powerpc.InsnBits{16, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 710:21..30 0:31..31(///)
+ {Name: "stdat", Opcode: 0x7c0005cc, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FC": powerpc.InsnBits{16, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 742:21..30 0:31..31(///)
+ {Name: "copy", Opcode: 0x7c403000, Mask: 0xffc0ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{10, 1}, "RB": powerpc.InsnBits{11, 5}}}, // 31:0..5 0:6..8(///) 1:9..9 774:16..20 0:21..31(///)
+ {Name: "cpabort", Opcode: 0x7c00068c, Mask: 0xffffffff, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 838:21..30 0:31..31(///)
+ {Name: "paste.", Opcode: 0x7c403001, Mask: 0xffc0ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{10, 1}, "RB": powerpc.InsnBits{11, 5}}}, // 31:0..5 0:6..8(///) 1:9..9 902:16..20 1:21..31
+ {Name: "lvebx", Opcode: 0x7c00000e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 7:21..30 0:31..31(///)
+ {Name: "lvehx", Opcode: 0x7c00004e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 39:21..30 0:31..31(///)
+ {Name: "lvewx", Opcode: 0x7c00008e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 71:21..30 0:31..31(///)
+ {Name: "lvx", Opcode: 0x7c0000ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 103:21..30 0:31..31(///)
+ {Name: "stvebx", Opcode: 0x7c00010e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 31:0..5 135:21..30 0:31..31(///)
+ {Name: "stvehx", Opcode: 0x7c00014e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 31:0..5 167:21..30 0:31..31(///)
+ {Name: "stvewx", Opcode: 0x7c00018e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 31:0..5 199:21..30 0:31..31(///)
+ {Name: "stvx", Opcode: 0x7c0001ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 31:0..5 231:21..30 0:31..31(///)
+ {Name: "lvxl", Opcode: 0x7c0002ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 31:0..5 359:21..30 0:31..31(///)
+ {Name: "stvxl", Opcode: 0x7c0003ce, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 31:0..5 487:21..30 0:31..31(///)
+ {Name: "subfc", Opcode: 0x7c000010, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 8:22..30 0:31(RC)
+ {Name: "subfc.", Opcode: 0x7c000011, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 8:22..30 1:31(RC)
+ {Name: "subfco", Opcode: 0x7c000410, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 8:22..30 0:31(RC)
+ {Name: "subfco.", Opcode: 0x7c000411, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 8:22..30 1:31(RC)
+ {Name: "subf", Opcode: 0x7c000050, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 40:22..30 0:31(RC)
+ {Name: "subf.", Opcode: 0x7c000051, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 40:22..30 1:31(RC)
+ {Name: "subfo", Opcode: 0x7c000450, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 40:22..30 0:31(RC)
+ {Name: "subfo.", Opcode: 0x7c000451, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 40:22..30 1:31(RC)
+ {Name: "neg", Opcode: 0x7c0000d0, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 104:22..30 0:31(RC)
+ {Name: "neg.", Opcode: 0x7c0000d1, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 104:22..30 1:31(RC)
+ {Name: "nego", Opcode: 0x7c0004d0, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 104:22..30 0:31(RC)
+ {Name: "nego.", Opcode: 0x7c0004d1, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 104:22..30 1:31(RC)
+ {Name: "subfe", Opcode: 0x7c000110, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 136:22..30 0:31(RC)
+ {Name: "subfe.", Opcode: 0x7c000111, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 136:22..30 1:31(RC)
+ {Name: "subfeo", Opcode: 0x7c000510, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 136:22..30 0:31(RC)
+ {Name: "subfeo.", Opcode: 0x7c000511, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 136:22..30 1:31(RC)
+ {Name: "subfze", Opcode: 0x7c000190, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 200:22..30 0:31(RC)
+ {Name: "subfze.", Opcode: 0x7c000191, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 200:22..30 1:31(RC)
+ {Name: "subfzeo", Opcode: 0x7c000590, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 200:22..30 0:31(RC)
+ {Name: "subfzeo.", Opcode: 0x7c000591, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 200:22..30 1:31(RC)
+ {Name: "subfme", Opcode: 0x7c0001d0, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 232:22..30 0:31(RC)
+ {Name: "subfme.", Opcode: 0x7c0001d1, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 232:22..30 1:31(RC)
+ {Name: "subfmeo", Opcode: 0x7c0005d0, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 232:22..30 0:31(RC)
+ {Name: "subfmeo.", Opcode: 0x7c0005d1, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 232:22..30 1:31(RC)
+ {Name: "mulhdu", Opcode: 0x7c000012, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 9:22..30 0:31(RC)
+ {Name: "mulhdu.", Opcode: 0x7c000013, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 9:22..30 1:31(RC)
+ {Name: "mulhd", Opcode: 0x7c000092, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 73:22..30 0:31(RC)
+ {Name: "mulhd.", Opcode: 0x7c000093, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 73:22..30 1:31(RC)
+ {Name: "mulld", Opcode: 0x7c0001d2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 233:22..30 0:31(RC)
+ {Name: "mulld.", Opcode: 0x7c0001d3, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 233:22..30 1:31(RC)
+ {Name: "mulldo", Opcode: 0x7c0005d2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 233:22..30 0:31(RC)
+ {Name: "mulldo.", Opcode: 0x7c0005d3, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 233:22..30 1:31(RC)
+ {Name: "modud", Opcode: 0x7c000212, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 265:21..30 0:31..31(///)
+ {Name: "divdeu", Opcode: 0x7c000312, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 393:22..30 0:31(RC)
+ {Name: "divdeu.", Opcode: 0x7c000313, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 393:22..30 1:31(RC)
+ {Name: "divdeuo", Opcode: 0x7c000712, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 393:22..30 0:31(RC)
+ {Name: "divdeuo.", Opcode: 0x7c000713, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 393:22..30 1:31(RC)
+ {Name: "divde", Opcode: 0x7c000352, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 425:22..30 0:31(RC)
+ {Name: "divde.", Opcode: 0x7c000353, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 425:22..30 1:31(RC)
+ {Name: "divdeo", Opcode: 0x7c000752, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 425:22..30 0:31(RC)
+ {Name: "divdeo.", Opcode: 0x7c000753, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 425:22..30 1:31(RC)
+ {Name: "divdu", Opcode: 0x7c000392, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 457:22..30 0:31(RC)
+ {Name: "divdu.", Opcode: 0x7c000393, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 457:22..30 1:31(RC)
+ {Name: "divduo", Opcode: 0x7c000792, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 457:22..30 0:31(RC)
+ {Name: "divduo.", Opcode: 0x7c000793, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 457:22..30 1:31(RC)
+ {Name: "divd", Opcode: 0x7c0003d2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 489:22..30 0:31(RC)
+ {Name: "divd.", Opcode: 0x7c0003d3, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 489:22..30 1:31(RC)
+ {Name: "divdo", Opcode: 0x7c0007d2, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 489:22..30 0:31(RC)
+ {Name: "divdo.", Opcode: 0x7c0007d3, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 489:22..30 1:31(RC)
+ {Name: "modsd", Opcode: 0x7c000612, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 777:21..30 0:31..31(///)
+ {Name: "addc", Opcode: 0x7c000014, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 10:22..30 0:31(RC)
+ {Name: "addc.", Opcode: 0x7c000015, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 10:22..30 1:31(RC)
+ {Name: "addco", Opcode: 0x7c000414, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 10:22..30 0:31(RC)
+ {Name: "addco.", Opcode: 0x7c000415, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 10:22..30 1:31(RC)
+ {Name: "addg6s", Opcode: 0x7c000094, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 74:22..30 0:31..31(///)
+ {Name: "adde", Opcode: 0x7c000114, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 138:22..30 0:31(RC)
+ {Name: "adde.", Opcode: 0x7c000115, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 138:22..30 1:31(RC)
+ {Name: "addeo", Opcode: 0x7c000514, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 138:22..30 0:31(RC)
+ {Name: "addeo.", Opcode: 0x7c000515, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 138:22..30 1:31(RC)
+ {Name: "addex", Opcode: 0x7c000154, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"CY": powerpc.InsnBits{21, 2}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 170:23..30 0:31..31(///)
+ {Name: "addze", Opcode: 0x7c000194, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 202:22..30 0:31(RC)
+ {Name: "addze.", Opcode: 0x7c000195, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 202:22..30 1:31(RC)
+ {Name: "addzeo", Opcode: 0x7c000594, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 202:22..30 0:31(RC)
+ {Name: "addzeo.", Opcode: 0x7c000595, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 202:22..30 1:31(RC)
+ {Name: "addme", Opcode: 0x7c0001d4, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 234:22..30 0:31(RC)
+ {Name: "addme.", Opcode: 0x7c0001d5, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 0:21(OE) 234:22..30 1:31(RC)
+ {Name: "addmeo", Opcode: 0x7c0005d4, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 234:22..30 0:31(RC)
+ {Name: "addmeo.", Opcode: 0x7c0005d5, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 1:21(OE) 234:22..30 1:31(RC)
+ {Name: "add", Opcode: 0x7c000214, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 266:22..30 0:31(RC)
+ {Name: "add.", Opcode: 0x7c000215, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 266:22..30 1:31(RC)
+ {Name: "addo", Opcode: 0x7c000614, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 266:22..30 0:31(RC)
+ {Name: "addo.", Opcode: 0x7c000615, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 266:22..30 1:31(RC)
+ {Name: "mulhwu", Opcode: 0x7c000016, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 11:22..30 0:31(RC)
+ {Name: "mulhwu.", Opcode: 0x7c000017, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 11:22..30 1:31(RC)
+ {Name: "mulhw", Opcode: 0x7c000096, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 75:22..30 0:31(RC)
+ {Name: "mulhw.", Opcode: 0x7c000097, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21..21(///) 75:22..30 1:31(RC)
+ {Name: "mullw", Opcode: 0x7c0001d6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 235:22..30 0:31(RC)
+ {Name: "mullw.", Opcode: 0x7c0001d7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 235:22..30 1:31(RC)
+ {Name: "mullwo", Opcode: 0x7c0005d6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 235:22..30 0:31(RC)
+ {Name: "mullwo.", Opcode: 0x7c0005d7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 235:22..30 1:31(RC)
+ {Name: "moduw", Opcode: 0x7c000216, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 267:21..30 0:31..31(///)
+ {Name: "divweu", Opcode: 0x7c000316, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 395:22..30 0:31(RC)
+ {Name: "divweu.", Opcode: 0x7c000317, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 395:22..30 1:31(RC)
+ {Name: "divweuo", Opcode: 0x7c000716, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 395:22..30 0:31(RC)
+ {Name: "divweuo.", Opcode: 0x7c000717, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 395:22..30 1:31(RC)
+ {Name: "divwe", Opcode: 0x7c000356, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 427:22..30 0:31(RC)
+ {Name: "divwe.", Opcode: 0x7c000357, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 427:22..30 1:31(RC)
+ {Name: "divweo", Opcode: 0x7c000756, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 427:22..30 0:31(RC)
+ {Name: "divweo.", Opcode: 0x7c000757, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 427:22..30 1:31(RC)
+ {Name: "divwu", Opcode: 0x7c000396, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 459:22..30 0:31(RC)
+ {Name: "divwu.", Opcode: 0x7c000397, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 459:22..30 1:31(RC)
+ {Name: "divwuo", Opcode: 0x7c000796, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 459:22..30 0:31(RC)
+ {Name: "divwuo.", Opcode: 0x7c000797, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 459:22..30 1:31(RC)
+ {Name: "divw", Opcode: 0x7c0003d6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 491:22..30 0:31(RC)
+ {Name: "divw.", Opcode: 0x7c0003d7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:21(OE) 491:22..30 1:31(RC)
+ {Name: "divwo", Opcode: 0x7c0007d6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 491:22..30 0:31(RC)
+ {Name: "divwo.", Opcode: 0x7c0007d7, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:21(OE) 491:22..30 1:31(RC)
+ {Name: "modsw", Opcode: 0x7c000616, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 779:21..30 0:31..31(///)
+ {Name: "lxsiwzx", Opcode: 0x7c000018, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 12:21..30
+ {Name: "lxsiwax", Opcode: 0x7c000098, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 76:21..30
+ {Name: "stxsiwx", Opcode: 0x7c000118, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 140:21..30
+ {Name: "lxvx", Opcode: 0x7c000218, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 4:21..24 0:25..25(///) 12:26..30
+ {Name: "lxvdsx", Opcode: 0x7c000298, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 332:21..30
+ {Name: "lxvwsx", Opcode: 0x7c0002d8, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 364:21..30
+ {Name: "stxvx", Opcode: 0x7c000318, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 396:21..30
+ {Name: "lxsspx", Opcode: 0x7c000418, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 524:21..30
+ {Name: "lxsdx", Opcode: 0x7c000498, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 588:21..30
+ {Name: "stxsspx", Opcode: 0x7c000518, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 652:21..30
+ {Name: "stxsdx", Opcode: 0x7c000598, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 716:21..30
+ {Name: "lxvw4x", Opcode: 0x7c000618, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 780:21..30
+ {Name: "lxvh8x", Opcode: 0x7c000658, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 812:21..30
+ {Name: "lxvd2x", Opcode: 0x7c000698, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 844:21..30
+ {Name: "lxvb16x", Opcode: 0x7c0006d8, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 876:21..30
+ {Name: "stxvw4x", Opcode: 0x7c000718, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 908:21..30
+ {Name: "stxvh8x", Opcode: 0x7c000758, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 940:21..30
+ {Name: "stxvd2x", Opcode: 0x7c000798, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 972:21..30
+ {Name: "stxvb16x", Opcode: 0x7c0007d8, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 1004:21..30
+ {Name: "lxvl", Opcode: 0x7c00021a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 269:21..30
+ {Name: "lxvll", Opcode: 0x7c00025a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 301:21..30
+ {Name: "stxvl", Opcode: 0x7c00031a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 397:21..30
+ {Name: "stxvll", Opcode: 0x7c00035a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 429:21..30
+ {Name: "lxsibzx", Opcode: 0x7c00061a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 781:21..30
+ {Name: "lxsihzx", Opcode: 0x7c00065a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 813:21..30
+ {Name: "stxsibx", Opcode: 0x7c00071a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 909:21..30
+ {Name: "stxsihx", Opcode: 0x7c00075a, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 941:21..30
+ {Name: "msgsndp", Opcode: 0x7c00011c, Mask: 0xffff07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 0:11..15(///) 142:21..30 0:31..31(///)
+ {Name: "msgclrp", Opcode: 0x7c00015c, Mask: 0xffff07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 0:11..15(///) 174:21..30 0:31..31(///)
+ {Name: "msgsnd", Opcode: 0x7c00019c, Mask: 0xffff07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 0:11..15(///) 206:21..30 0:31..31(///)
+ {Name: "msgclr", Opcode: 0x7c0001dc, Mask: 0xffff07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 0:11..15(///) 238:21..30 0:31..31(///)
+ {Name: "mfbhrbe", Opcode: 0x7c00025c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BHRBE": powerpc.InsnBits{11, 10}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 302:21..30 0:31..31(///)
+ {Name: "clrbhrb", Opcode: 0x7c00035c, Mask: 0xffffffff, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 430:21..30 0:31..31(///)
+ {Name: "tend.", Opcode: 0x7c007001, Mask: 0xfdffffff, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{6, 1}}}, // 31:0..5 0:7..9(///) 0:10..10(///) 0:11..15(///) 686:16..20 1:21..31
+ {Name: "tcheck", Opcode: 0x7c00059c, Mask: 0xfc7fffff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}}}, // 31:0..5 0:9..10(///) 0:11..15(///) 0:16..20(///) 718:21..30 0:31..31(///)
+ {Name: "tsr.", Opcode: 0x7c0005dd, Mask: 0xffdfffff, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{10, 1}}}, // 31:0..5 0:6..9(///) 0:11..15(///) 0:16..20(///) 750:21..30 1:31..31
+ {Name: "tbegin.", Opcode: 0x7c00051d, Mask: 0xfddfffff, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{6, 1}, "R": powerpc.InsnBits{10, 1}}}, // 31:0..5 0:7..9(///) 0:11..15(///) 0:16..20(///) 654:21..30 1:31..31
+ {Name: "tabortwc.", Opcode: 0x7c00061d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "TO": powerpc.InsnBits{6, 5}}}, // 31:0..5 782:21..30 1:31..31
+ {Name: "tabortdc.", Opcode: 0x7c00065d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "TO": powerpc.InsnBits{6, 5}}}, // 31:0..5 814:21..30 1:31..31
+ {Name: "tabortwci.", Opcode: 0x7c00069d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "SI": powerpc.InsnBits{16, 5}, "TO": powerpc.InsnBits{6, 5}}}, // 31:0..5 846:21..30 1:31..31
+ {Name: "tabortdci.", Opcode: 0x7c0006dd, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "SI": powerpc.InsnBits{16, 5}, "TO": powerpc.InsnBits{6, 5}}}, // 31:0..5 878:21..30 1:31..31
+ {Name: "tabort.", Opcode: 0x7c00071d, Mask: 0xffe0ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}}}, // 31:0..5 0:6..10(///) 0:16..20(///) 910:21..30 1:31..31
+ {Name: "treclaim.", Opcode: 0x7c00075d, Mask: 0xffe0ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}}}, // 31:0..5 0:6..10(///) 0:16..20(///) 942:21..30 1:31..31
+ {Name: "trechkpt.", Opcode: 0x7c0007dd, Mask: 0xffffffff, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 1006:21..30 1:31..31
+ {Name: "isel", Opcode: 0x7c00001e, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"BC": powerpc.InsnBits{21, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 15:26..30 0:31..31(///)
+ {Name: "mtcrf", Opcode: 0x7c000120, Mask: 0xfc100fff, Fields: map[string]powerpc.InsnBits{"FXM": powerpc.InsnBits{12, 8}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..11 0:20..20(///) 144:21..30 0:31..31(///)
+ {Name: "mtocrf", Opcode: 0x7c100120, Mask: 0xfc100fff, Fields: map[string]powerpc.InsnBits{"FXM": powerpc.InsnBits{12, 8}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:11..11 0:20..20(///) 144:21..30 0:31..31(///)
+ {Name: "mtmsr", Opcode: 0x7c000092, Mask: 0xfc1effff, Priv: true, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{15, 1}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..14(///) 0:16..20(///) 146:21..31
+ {Name: "mtmsrd", Opcode: 0x7c000164, Mask: 0xfc1effff, Priv: true, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{15, 1}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..14(///) 0:16..20(///) 178:21..30 0:31..31(///)
+ {Name: "tlbiel", Opcode: 0x7c000112, Mask: 0xfc1007ff, M64: true, Priv: true, Fields: map[string]powerpc.InsnBits{"PRS": powerpc.InsnBits{14, 1}, "R": powerpc.InsnBits{15, 1}, "RB": powerpc.InsnBits{16, 5}, "RIC": powerpc.InsnBits{12, 2}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..11(///) 274:21..31
+ {Name: "tlbie", Opcode: 0x7c000132, Mask: 0xfc1007ff, M64: true, Priv: true, Fields: map[string]powerpc.InsnBits{"PRS": powerpc.InsnBits{14, 1}, "R": powerpc.InsnBits{15, 1}, "RB": powerpc.InsnBits{16, 5}, "RIC": powerpc.InsnBits{12, 2}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..11(///) 306:21..31
+ {Name: "slbsync", Opcode: 0x7c0002a4, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 338:21..30 0:31..31(///)
+ {Name: "slbmte", Opcode: 0x7c000324, Mask: 0xfc1f07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..15(///) 402:21..30 0:31..31(///)
+ {Name: "slbie", Opcode: 0x7c000364, Mask: 0xffff07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 0:11..15(///) 434:21..30 0:31..31(///)
+ {Name: "slbieg", Opcode: 0x7c0003a4, Mask: 0xfc1f07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..15(///) 466:21..30 0:31..31(///)
+ {Name: "slbia", Opcode: 0x7c0003e4, Mask: 0xff1fffff, Priv: true, Fields: map[string]powerpc.InsnBits{"IH": powerpc.InsnBits{8, 3}}}, // 31:0..5 0:6..7(///) 0:11..15(///) 0:16..20(///) 498:21..30 0:31..31(///)
+ {Name: "slbiag", Opcode: 0x7c0006a4, Mask: 0xfc1fffff, Priv: true, Fields: map[string]powerpc.InsnBits{"RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..15(///) 0:16..20(///) 850:21..30 0:31..31(///)
+ {Name: "mfcr", Opcode: 0x7c000026, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..11 0:12..20(///) 19:21..30 0:31..31(///)
+ {Name: "mfocrf", Opcode: 0x7c100026, Mask: 0xfc100fff, Fields: map[string]powerpc.InsnBits{"FXM": powerpc.InsnBits{12, 8}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 1:11..11 0:20..20(///) 19:21..30 0:31..31(///)
+ {Name: "mfvsrd", Opcode: 0x7c000066, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 51:21..30
+ {Name: "mfmsr", Opcode: 0x7c0000a6, Mask: 0xfc1fffff, Priv: true, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..15(///) 0:16..20(///) 83:21..30 0:31..31(///)
+ {Name: "mfvsrwz", Opcode: 0x7c0000e6, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 115:21..30
+ {Name: "mtvsrd", Opcode: 0x7c000166, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 179:21..30
+ {Name: "mtvsrwa", Opcode: 0x7c0001a6, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 211:21..30
+ {Name: "mtvsrwz", Opcode: 0x7c0001e6, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 243:21..30
+ {Name: "mfvsrld", Opcode: 0x7c000266, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 307:21..30
+ {Name: "mfspr", Opcode: 0x7c0002a6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}, "SPR": powerpc.InsnBits{11, 10}}}, // 31:0..5 339:21..30 0:31..31(///)
+ {Name: "mftb", Opcode: 0x7c0002e6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}, "TBR": powerpc.InsnBits{11, 10}}}, // 31:0..5 371:21..30 0:31..31(///)
+ {Name: "[Phased-Out]", Opcode: 0x7c0002e6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RT": powerpc.InsnBits{6, 5}, "TBR": powerpc.InsnBits{11, 10}}}, // 31:0..5 371:21..30 0:31..31(///)
+ {Name: "mtvsrws", Opcode: 0x7c000326, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 0:16..20(///) 403:21..30
+ {Name: "mtvsrdd", Opcode: 0x7c000366, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 31:0..5 435:21..30
+ {Name: "mtspr", Opcode: 0x7c0003a6, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RS": powerpc.InsnBits{6, 5}, "SPR": powerpc.InsnBits{11, 10}}}, // 31:0..5 467:21..30 0:31..31(///)
+ {Name: "darn", Opcode: 0x7c0005e6, Mask: 0xfc1cffff, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{14, 2}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..13(///) 0:16..20(///) 755:21..30 0:31..31(///)
+ {Name: "slbmfev", Opcode: 0x7c0006a6, Mask: 0xfc1e07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{15, 1}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..14(///) 851:21..30 0:31..31(///)
+ {Name: "slbmfee", Opcode: 0x7c000726, Mask: 0xfc1e07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{15, 1}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..14(///) 915:21..30 0:31..31(///)
+ {Name: "slbfee.", Opcode: 0x7c0007a7, Mask: 0xfc1f07ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:11..15(///) 979:21..30 1:31..31
+ {Name: "lwarx", Opcode: 0x7c000028, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"EH": powerpc.InsnBits{31, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 20:21..30
+ {Name: "lbarx", Opcode: 0x7c000068, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"EH": powerpc.InsnBits{31, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 52:21..30
+ {Name: "ldarx", Opcode: 0x7c0000a8, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"EH": powerpc.InsnBits{31, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 84:21..30
+ {Name: "lharx", Opcode: 0x7c0000e8, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"EH": powerpc.InsnBits{31, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 116:21..30
+ {Name: "lqarx", Opcode: 0x7c000228, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"EH": powerpc.InsnBits{31, 1}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RTP": powerpc.InsnBits{6, 5}}}, // 31:0..5 276:21..30
+ {Name: "ldbrx", Opcode: 0x7c000428, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 532:21..30 0:31..31(///)
+ {Name: "stdbrx", Opcode: 0x7c000528, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 660:21..30 0:31..31(///)
+ {Name: "ldx", Opcode: 0x7c00002a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 21:21..30 0:31..31(///)
+ {Name: "ldux", Opcode: 0x7c00006a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 53:21..30 0:31..31(///)
+ {Name: "stdx", Opcode: 0x7c00012a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 149:21..30 0:31..31(///)
+ {Name: "stdux", Opcode: 0x7c00016a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 181:21..30 0:31..31(///)
+ {Name: "lwax", Opcode: 0x7c0002aa, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 341:21..30 0:31..31(///)
+ {Name: "lwaux", Opcode: 0x7c0002ea, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 373:21..30 0:31..31(///)
+ {Name: "lswx", Opcode: 0x7c00042a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 533:21..30 0:31..31(///)
+ {Name: "lswi", Opcode: 0x7c0004aa, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"NB": powerpc.InsnBits{16, 5}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 597:21..30 0:31..31(///)
+ {Name: "stswx", Opcode: 0x7c00052a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 661:21..30 0:31..31(///)
+ {Name: "stswi", Opcode: 0x7c0005aa, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"NB": powerpc.InsnBits{16, 5}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 725:21..30 0:31..31(///)
+ {Name: "lwzcix", Opcode: 0x7c00062a, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 789:21..30 0:31..31(///)
+ {Name: "lhzcix", Opcode: 0x7c00066a, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 821:21..30 0:31..31(///)
+ {Name: "lbzcix", Opcode: 0x7c0006aa, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 853:21..30 0:31..31(///)
+ {Name: "ldcix", Opcode: 0x7c0006ea, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 885:21..30 0:31..31(///)
+ {Name: "stwcix", Opcode: 0x7c00072a, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 917:21..30 0:31..31(///)
+ {Name: "sthcix", Opcode: 0x7c00076a, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 949:21..30 0:31..31(///)
+ {Name: "stbcix", Opcode: 0x7c0007aa, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 981:21..30 0:31..31(///)
+ {Name: "stdcix", Opcode: 0x7c0007ea, Mask: 0xfc0007ff, Priv: true, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 1013:21..30 0:31..31(///)
+ {Name: "icbt", Opcode: 0x7c00002c, Mask: 0xfe0007ff, Fields: map[string]powerpc.InsnBits{"CT": powerpc.InsnBits{7, 4}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..6(///) 22:21..30 0:31..31(///)
+ {Name: "dcbst", Opcode: 0x7c00006c, Mask: 0xffe007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 54:21..30 0:31..31(///)
+ {Name: "dcbf", Opcode: 0x7c0000ac, Mask: 0xff8007ff, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{9, 2}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..8(///) 86:21..30 0:31..31(///)
+ {Name: "dcbtst", Opcode: 0x7c0001ec, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "TH": powerpc.InsnBits{6, 5}}}, // 31:0..5 246:21..30 0:31..31(///)
+ {Name: "dcbt", Opcode: 0x7c00022c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "TH": powerpc.InsnBits{6, 5}}}, // 31:0..5 278:21..30 0:31..31(///)
+ {Name: "lwbrx", Opcode: 0x7c00042c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 534:21..30 0:31..31(///)
+ {Name: "tlbsync", Opcode: 0x7c00046c, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 566:21..30 0:31..31(///)
+ {Name: "sync", Opcode: 0x7c0004ac, Mask: 0xff9fffff, Fields: map[string]powerpc.InsnBits{"L": powerpc.InsnBits{9, 2}}}, // 31:0..5 0:6..8(///) 0:11..15(///) 0:16..20(///) 598:21..30 0:31..31(///)
+ {Name: "stwbrx", Opcode: 0x7c00052c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 662:21..30 0:31..31(///)
+ {Name: "lhbrx", Opcode: 0x7c00062c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 790:21..30 0:31..31(///)
+ {Name: "eieio", Opcode: 0x7c0006ac, Mask: 0xffffffff, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 854:21..30 0:31..31(///)
+ {Name: "msgsync", Opcode: 0x7c0006ec, Mask: 0xffffffff, Priv: true, Fields: map[string]powerpc.InsnBits{}}, // 31:0..5 0:6..10(///) 0:11..15(///) 0:16..20(///) 886:21..30 0:31..31(///)
+ {Name: "sthbrx", Opcode: 0x7c00072c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 918:21..30 0:31..31(///)
+ {Name: "icbi", Opcode: 0x7c0007ac, Mask: 0xffe007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 982:21..30 0:31..31(///)
+ {Name: "dcbz", Opcode: 0x7c0007ec, Mask: 0xffe007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 0:6..10(///) 1014:21..30 0:31..31(///)
+ {Name: "stwcx.", Opcode: 0x7c00012d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 150:21..30 1:31..31
+ {Name: "stqcx.", Opcode: 0x7c00016d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RSP": powerpc.InsnBits{6, 5}}}, // 31:0..5 182:21..30 1:31..31
+ {Name: "stdcx.", Opcode: 0x7c0001ad, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 214:21..30 1:31..31
+ {Name: "stbcx.", Opcode: 0x7c00056d, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 694:21..30 1:31..31
+ {Name: "sthcx.", Opcode: 0x7c0005ad, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 726:21..30 1:31..31
+ {Name: "lwzx", Opcode: 0x7c00002e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 23:21..30 0:31..31(///)
+ {Name: "lwzux", Opcode: 0x7c00006e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 55:21..30 0:31..31(///)
+ {Name: "lbzx", Opcode: 0x7c0000ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 87:21..30 0:31..31(///)
+ {Name: "lbzux", Opcode: 0x7c0000ee, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 119:21..30 0:31..31(///)
+ {Name: "stwx", Opcode: 0x7c00012e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 151:21..30 0:31..31(///)
+ {Name: "stwux", Opcode: 0x7c00016e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 183:21..30 0:31..31(///)
+ {Name: "stbx", Opcode: 0x7c0001ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 215:21..30 0:31..31(///)
+ {Name: "stbux", Opcode: 0x7c0001ee, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 247:21..30 0:31..31(///)
+ {Name: "lhzx", Opcode: 0x7c00022e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 279:21..30 0:31..31(///)
+ {Name: "lhzux", Opcode: 0x7c00026e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 311:21..30 0:31..31(///)
+ {Name: "lhax", Opcode: 0x7c0002ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 343:21..30 0:31..31(///)
+ {Name: "lhaux", Opcode: 0x7c0002ee, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 31:0..5 375:21..30 0:31..31(///)
+ {Name: "sthx", Opcode: 0x7c00032e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 407:21..30 0:31..31(///)
+ {Name: "sthux", Opcode: 0x7c00036e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 439:21..30 0:31..31(///)
+ {Name: "lfsx", Opcode: 0x7c00042e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 535:21..30 0:31..31(///)
+ {Name: "lfsux", Opcode: 0x7c00046e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 567:21..30 0:31..31(///)
+ {Name: "lfdx", Opcode: 0x7c0004ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 599:21..30 0:31..31(///)
+ {Name: "lfdux", Opcode: 0x7c0004ee, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 631:21..30 0:31..31(///)
+ {Name: "stfsx", Opcode: 0x7c00052e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 663:21..30 0:31..31(///)
+ {Name: "stfsux", Opcode: 0x7c00056e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 695:21..30 0:31..31(///)
+ {Name: "stfdx", Opcode: 0x7c0005ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 727:21..30 0:31..31(///)
+ {Name: "stfdux", Opcode: 0x7c0005ee, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 759:21..30 0:31..31(///)
+ {Name: "lfdpx", Opcode: 0x7c00062e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRTP": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 791:21..30 0:31..31(///)
+ {Name: "lfiwax", Opcode: 0x7c0006ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 855:21..30 0:31..31(///)
+ {Name: "lfiwzx", Opcode: 0x7c0006ee, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 887:21..30 0:31..31(///)
+ {Name: "stfdpx", Opcode: 0x7c00072e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRSP": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 919:21..30 0:31..31(///)
+ {Name: "stfiwx", Opcode: 0x7c0007ae, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}}}, // 31:0..5 983:21..30 0:31..31(///)
+ {Name: "slw", Opcode: 0x7c000030, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 24:21..30 0:31(RC)
+ {Name: "slw.", Opcode: 0x7c000031, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 24:21..30 1:31(RC)
+ {Name: "srw", Opcode: 0x7c000430, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 536:21..30 0:31(RC)
+ {Name: "srw.", Opcode: 0x7c000431, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 536:21..30 1:31(RC)
+ {Name: "sraw", Opcode: 0x7c000630, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 792:21..30 0:31(RC)
+ {Name: "sraw.", Opcode: 0x7c000631, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 792:21..30 1:31(RC)
+ {Name: "srawi", Opcode: 0x7c000670, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 5}}}, // 31:0..5 824:21..30 0:31(RC)
+ {Name: "srawi.", Opcode: 0x7c000671, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 5}}}, // 31:0..5 824:21..30 1:31(RC)
+ {Name: "cntlzw", Opcode: 0x7c000034, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 26:21..30 0:31(RC)
+ {Name: "cntlzw.", Opcode: 0x7c000035, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 26:21..30 1:31(RC)
+ {Name: "cntlzd", Opcode: 0x7c000074, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 58:21..30 0:31(RC)
+ {Name: "cntlzd.", Opcode: 0x7c000075, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 58:21..30 1:31(RC)
+ {Name: "popcntb", Opcode: 0x7c0000f4, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 122:21..30 0:31..31(///)
+ {Name: "prtyw", Opcode: 0x7c000134, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 154:21..30 0:31..31(///)
+ {Name: "prtyd", Opcode: 0x7c000174, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 186:21..30 0:31..31(///)
+ {Name: "cdtbcd", Opcode: 0x7c000234, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 282:21..30 0:31..31(///)
+ {Name: "cbcdtd", Opcode: 0x7c000274, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 314:21..30 0:31..31(///)
+ {Name: "popcntw", Opcode: 0x7c0002f4, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 378:21..30 0:31..31(///)
+ {Name: "popcntd", Opcode: 0x7c0003f4, Mask: 0xfc00fffe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RC": powerpc.InsnBits{31, 1}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 506:21..30
+ {Name: "cnttzw", Opcode: 0x7c000434, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 538:21..30 0:31(RC)
+ {Name: "cnttzw.", Opcode: 0x7c000435, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 538:21..30 1:31(RC)
+ {Name: "cnttzd", Opcode: 0x7c000474, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 570:21..30 0:31(RC)
+ {Name: "cnttzd.", Opcode: 0x7c000475, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 570:21..30 1:31(RC)
+ {Name: "srad", Opcode: 0x7c000634, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 794:21..30 0:31(RC)
+ {Name: "srad.", Opcode: 0x7c000635, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 794:21..30 1:31(RC)
+ {Name: "sradi", Opcode: 0x7c000674, Mask: 0xfc0007fd, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 31:0..5 413:21..29 0:31(RC)
+ {Name: "sradi.", Opcode: 0x7c000675, Mask: 0xfc0007fd, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 31:0..5 413:21..29 1:31(RC)
+ {Name: "extswsli", Opcode: 0x7c0006f4, Mask: 0xfc0007fd, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 31:0..5 445:21..29 0:31(RC)
+ {Name: "extswsli.", Opcode: 0x7c0006f5, Mask: 0xfc0007fd, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{30, 1}}}, // 31:0..5 445:21..29 1:31(RC)
+ {Name: "extsh", Opcode: 0x7c000734, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 922:21..30 0:31(RC)
+ {Name: "extsh.", Opcode: 0x7c000735, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 922:21..30 1:31(RC)
+ {Name: "extsb", Opcode: 0x7c000774, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 954:21..30 0:31(RC)
+ {Name: "extsb.", Opcode: 0x7c000775, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 954:21..30 1:31(RC)
+ {Name: "extsw", Opcode: 0x7c0007b4, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 986:21..30 0:31(RC)
+ {Name: "extsw.", Opcode: 0x7c0007b5, Mask: 0xfc00ffff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 0:16..20(///) 986:21..30 1:31(RC)
+ {Name: "sld", Opcode: 0x7c000036, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 27:21..30 0:31(RC)
+ {Name: "sld.", Opcode: 0x7c000037, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 27:21..30 1:31(RC)
+ {Name: "srd", Opcode: 0x7c000436, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 539:21..30 0:31(RC)
+ {Name: "srd.", Opcode: 0x7c000437, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 539:21..30 1:31(RC)
+ {Name: "and", Opcode: 0x7c000038, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 28:21..30 0:31(RC)
+ {Name: "and.", Opcode: 0x7c000039, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 28:21..30 1:31(RC)
+ {Name: "andc", Opcode: 0x7c000078, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 60:21..30 0:31(RC)
+ {Name: "andc.", Opcode: 0x7c000079, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 60:21..30 1:31(RC)
+ {Name: "nor", Opcode: 0x7c0000f8, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 124:21..30 0:31(RC)
+ {Name: "nor.", Opcode: 0x7c0000f9, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 124:21..30 1:31(RC)
+ {Name: "bpermd", Opcode: 0x7c0000fc, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 252:21..31
+ {Name: "eqv", Opcode: 0x7c000238, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 284:21..30 0:31(RC)
+ {Name: "eqv.", Opcode: 0x7c000239, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 284:21..30 1:31(RC)
+ {Name: "xor", Opcode: 0x7c000278, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 316:21..30 0:31(RC)
+ {Name: "xor.", Opcode: 0x7c000279, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 316:21..30 1:31(RC)
+ {Name: "orc", Opcode: 0x7c000338, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 412:21..30 0:31(RC)
+ {Name: "orc.", Opcode: 0x7c000339, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 412:21..30 1:31(RC)
+ {Name: "or", Opcode: 0x7c000378, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 444:21..30 0:31(RC)
+ {Name: "or.", Opcode: 0x7c000379, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 444:21..30 1:31(RC)
+ {Name: "nand", Opcode: 0x7c0003b8, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 476:21..30 0:31(RC)
+ {Name: "nand.", Opcode: 0x7c0003b9, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 476:21..30 1:31(RC)
+ {Name: "cmpb", Opcode: 0x7c0003f8, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 31:0..5 508:21..30 0:31..31(///)
+ {Name: "wait", Opcode: 0x7c00003c, Mask: 0xff9fffff, Fields: map[string]powerpc.InsnBits{"WC": powerpc.InsnBits{9, 2}}}, // 31:0..5 0:6..8(///) 0:11..15(///) 0:16..20(///) 30:21..30 0:31..31(///)
+ {Name: "lwz", Opcode: 0x80000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 32:0..5
+ {Name: "lwzu", Opcode: 0x84000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 33:0..5
+ {Name: "lbz", Opcode: 0x88000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 34:0..5
+ {Name: "lbzu", Opcode: 0x8c000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 35:0..5
+ {Name: "stw", Opcode: 0x90000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 36:0..5
+ {Name: "stwu", Opcode: 0x94000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 37:0..5
+ {Name: "stb", Opcode: 0x98000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 38:0..5
+ {Name: "stbu", Opcode: 0x9c000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 39:0..5
+ {Name: "lhz", Opcode: 0xa0000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 40:0..5
+ {Name: "lhzu", Opcode: 0xa4000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 41:0..5
+ {Name: "lha", Opcode: 0xa8000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 42:0..5
+ {Name: "lhau", Opcode: 0xac000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 43:0..5
+ {Name: "sth", Opcode: 0xb0000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 44:0..5
+ {Name: "sthu", Opcode: 0xb4000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 45:0..5
+ {Name: "lmw", Opcode: 0xb8000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 46:0..5
+ {Name: "stmw", Opcode: 0xbc000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 47:0..5
+ {Name: "lfs", Opcode: 0xc0000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 48:0..5
+ {Name: "lfsu", Opcode: 0xc4000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 49:0..5
+ {Name: "lfd", Opcode: 0xc8000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 50:0..5
+ {Name: "lfdu", Opcode: 0xcc000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRT": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 51:0..5
+ {Name: "stfs", Opcode: 0xd0000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 52:0..5
+ {Name: "stfsu", Opcode: 0xd4000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 53:0..5
+ {Name: "stfd", Opcode: 0xd8000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 54:0..5
+ {Name: "stfdu", Opcode: 0xdc000000, Mask: 0xfc000000, Fields: map[string]powerpc.InsnBits{"D": powerpc.InsnBits{16, 16}, "FRS": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 55:0..5
+ {Name: "lq", Opcode: 0xe0000000, Mask: 0xfc00000f, Fields: map[string]powerpc.InsnBits{"DQ": powerpc.InsnBits{16, 12}, "RA": powerpc.InsnBits{11, 5}, "RTP": powerpc.InsnBits{6, 5}}}, // 56:0..5 0:28..31(///)
+ {Name: "lfdp", Opcode: 0xe4000000, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "FRTP": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 57:0..5 0:30..31
+ {Name: "lxsd", Opcode: 0xe4000002, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 57:0..5 2:30..31
+ {Name: "lxssp", Opcode: 0xe4000003, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 57:0..5 3:30..31
+ {Name: "ld", Opcode: 0xe8000000, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 58:0..5 0:30..31
+ {Name: "ldu", Opcode: 0xe8000001, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 58:0..5 1:30..31
+ {Name: "lwa", Opcode: 0xe8000002, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "RT": powerpc.InsnBits{6, 5}}}, // 58:0..5 2:30..31
+ {Name: "dadd", Opcode: 0xec000004, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 2:21..30 0:31(RC)
+ {Name: "dadd.", Opcode: 0xec000005, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 2:21..30 1:31(RC)
+ {Name: "dmul", Opcode: 0xec000044, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 34:21..30 0:31(RC)
+ {Name: "dmul.", Opcode: 0xec000045, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 34:21..30 1:31(RC)
+ {Name: "dscli", Opcode: 0xec000084, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRT": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 59:0..5 66:22..30 0:31(RC)
+ {Name: "dscli.", Opcode: 0xec000085, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRT": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 59:0..5 66:22..30 1:31(RC)
+ {Name: "dscri", Opcode: 0xec0000c4, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRT": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 59:0..5 98:22..30 0:31(RC)
+ {Name: "dscri.", Opcode: 0xec0000c5, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRT": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 59:0..5 98:22..30 1:31(RC)
+ {Name: "dcmpo", Opcode: 0xec000082, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}}}, // 59:0..5 0:9..10(///) 130:21..31
+ {Name: "dtstex", Opcode: 0xec000144, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}}}, // 59:0..5 0:9..10(///) 162:21..30 0:31..31(///)
+ {Name: "dtstdc", Opcode: 0xec000184, Mask: 0xfc6003ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "DCM": powerpc.InsnBits{16, 6}, "FRA": powerpc.InsnBits{11, 5}}}, // 59:0..5 0:9..10(///) 194:22..30 0:31..31(///)
+ {Name: "dtstdg", Opcode: 0xec0001c4, Mask: 0xfc6003ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "DGM": powerpc.InsnBits{16, 6}, "FRA": powerpc.InsnBits{11, 5}}}, // 59:0..5 0:9..10(///) 226:22..30 0:31..31(///)
+ {Name: "dctdp", Opcode: 0xec000204, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 258:21..30 0:31(RC)
+ {Name: "dctdp.", Opcode: 0xec000205, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 258:21..30 1:31(RC)
+ {Name: "dctfix", Opcode: 0xec000244, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 290:21..30 0:31(RC)
+ {Name: "dctfix.", Opcode: 0xec000245, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 290:21..30 1:31(RC)
+ {Name: "ddedpd", Opcode: 0xec000284, Mask: 0xfc0707ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "SP": powerpc.InsnBits{11, 2}}}, // 59:0..5 0:13..15(///) 322:21..30 0:31(RC)
+ {Name: "ddedpd.", Opcode: 0xec000285, Mask: 0xfc0707ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "SP": powerpc.InsnBits{11, 2}}}, // 59:0..5 0:13..15(///) 322:21..30 1:31(RC)
+ {Name: "dxex", Opcode: 0xec0002c4, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 354:21..30 0:31(RC)
+ {Name: "dxex.", Opcode: 0xec0002c5, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 354:21..30 1:31(RC)
+ {Name: "dsub", Opcode: 0xec000404, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 514:21..30 0:31(RC)
+ {Name: "dsub.", Opcode: 0xec000405, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 514:21..30 1:31(RC)
+ {Name: "ddiv", Opcode: 0xec000444, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 546:21..30 0:31(RC)
+ {Name: "ddiv.", Opcode: 0xec000445, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 546:21..30 1:31(RC)
+ {Name: "dcmpu", Opcode: 0xec000504, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}}}, // 59:0..5 0:9..10(///) 642:21..30 0:31..31(///)
+ {Name: "dtstsf", Opcode: 0xec000544, Mask: 0xfc4007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{10, 6}, "FRB": powerpc.InsnBits{16, 5}}}, // 59:0..5 0:9..9(///) 674:21..30 0:31..31(///)
+ {Name: "drsp", Opcode: 0xec000604, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 770:21..30 0:31(RC)
+ {Name: "drsp.", Opcode: 0xec000605, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 770:21..30 1:31(RC)
+ {Name: "dcffix", Opcode: 0xec000644, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 802:21..30 0:31(RC)
+ {Name: "dcffix.", Opcode: 0xec000645, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 802:21..30 1:31(RC)
+ {Name: "denbcd", Opcode: 0xec000684, Mask: 0xfc0f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "S": powerpc.InsnBits{11, 1}}}, // 59:0..5 0:12..15(///) 834:21..30 0:31(RC)
+ {Name: "denbcd.", Opcode: 0xec000685, Mask: 0xfc0f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "S": powerpc.InsnBits{11, 1}}}, // 59:0..5 0:12..15(///) 834:21..30 1:31(RC)
+ {Name: "diex", Opcode: 0xec0006c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 866:21..30 0:31(RC)
+ {Name: "diex.", Opcode: 0xec0006c5, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 866:21..30 1:31(RC)
+ {Name: "dqua", Opcode: 0xec000006, Mask: 0xfc0001fe, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 3:23..30
+ {Name: "dqua.", Opcode: 0xec000006, Mask: 0xfc0001fe, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 3:23..30
+ {Name: "drrnd", Opcode: 0xec000046, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 35:23..30 0:31(RC)
+ {Name: "drrnd.", Opcode: 0xec000046, Mask: 0xfc0001fe, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 35:23..30
+ {Name: "dquai", Opcode: 0xec000086, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}, "TE": powerpc.InsnBits{11, 5}}}, // 59:0..5 67:23..30 0:31(RC)
+ {Name: "dquai.", Opcode: 0xec000087, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}, "TE": powerpc.InsnBits{11, 5}}}, // 59:0..5 67:23..30 1:31(RC)
+ {Name: "drintx", Opcode: 0xec0000c6, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 0:11..14(///) 99:23..30 0:31(RC)
+ {Name: "drintx.", Opcode: 0xec0000c7, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 0:11..14(///) 99:23..30 1:31(RC)
+ {Name: "drintn", Opcode: 0xec0001c6, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 0:11..14(///) 227:23..30 0:31(RC)
+ {Name: "drintn.", Opcode: 0xec0001c7, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 59:0..5 0:11..14(///) 227:23..30 1:31(RC)
+ {Name: "dtstsfi", Opcode: 0xec000546, Mask: 0xfc4007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRB": powerpc.InsnBits{16, 5}, "UIM": powerpc.InsnBits{10, 6}}}, // 59:0..5 0:9..9(///) 675:21..30 0:31..31(///)
+ {Name: "fcfids", Opcode: 0xfc00069c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 846:21..30 0:31(RC)
+ {Name: "fcfids.", Opcode: 0xfc00069d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 846:21..30 1:31(RC)
+ {Name: "fcfidus", Opcode: 0xec00079c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 974:21..30 0:31(RC)
+ {Name: "fcfidus.", Opcode: 0xec00079d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 974:21..30 1:31(RC)
+ {Name: "fdivs", Opcode: 0xec000024, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:21..25(///) 18:26..30 0:31(RC)
+ {Name: "fdivs.", Opcode: 0xec000025, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:21..25(///) 18:26..30 1:31(RC)
+ {Name: "fsubs", Opcode: 0xec000028, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:21..25(///) 20:26..30 0:31(RC)
+ {Name: "fsubs.", Opcode: 0xec000029, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:21..25(///) 20:26..30 1:31(RC)
+ {Name: "fadds", Opcode: 0xec00002a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:21..25(///) 21:26..30 0:31(RC)
+ {Name: "fadds.", Opcode: 0xec00002b, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:21..25(///) 21:26..30 1:31(RC)
+ {Name: "fsqrts", Opcode: 0xec00002c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 0:21..25(///) 22:26..30 0:31(RC)
+ {Name: "fsqrts.", Opcode: 0xec00002d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 0:21..25(///) 22:26..30 1:31(RC)
+ {Name: "fres", Opcode: 0xec000030, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 0:21..25(///) 24:26..30 0:31(RC)
+ {Name: "fres.", Opcode: 0xec000031, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 0:21..25(///) 24:26..30 1:31(RC)
+ {Name: "fmuls", Opcode: 0xec000032, Mask: 0xfc00f83f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:16..20(///) 25:26..30 0:31(RC)
+ {Name: "fmuls.", Opcode: 0xec000033, Mask: 0xfc00f83f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:16..20(///) 25:26..30 1:31(RC)
+ {Name: "frsqrtes", Opcode: 0xec000034, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 0:21..25(///) 26:26..30 0:31(RC)
+ {Name: "frsqrtes.", Opcode: 0xec000035, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 0:11..15(///) 0:21..25(///) 26:26..30 1:31(RC)
+ {Name: "fmsubs", Opcode: 0xec000038, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 28:26..30 0:31(RC)
+ {Name: "fmsubs.", Opcode: 0xec000039, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 28:26..30 1:31(RC)
+ {Name: "fmadds", Opcode: 0xec00003a, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 29:26..30 0:31(RC)
+ {Name: "fmadds.", Opcode: 0xec00003b, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 29:26..30 1:31(RC)
+ {Name: "fnmsubs", Opcode: 0xec00003c, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 30:26..30 0:31(RC)
+ {Name: "fnmsubs.", Opcode: 0xec00003d, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 30:26..30 1:31(RC)
+ {Name: "fnmadds", Opcode: 0xec00003e, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 31:26..30 0:31(RC)
+ {Name: "fnmadds.", Opcode: 0xec00003f, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 59:0..5 31:26..30 1:31(RC)
+ {Name: "xsaddsp", Opcode: 0xf0000000, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21..28
+ {Name: "xssubsp", Opcode: 0xf0000020, Mask: 0xfc0007fc, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{30, 0}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 8:21..29
+ {Name: "xsmulsp", Opcode: 0xf0000080, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 16:21..28
+ {Name: "xsdivsp", Opcode: 0xf00000c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 24:21..28
+ {Name: "xsadddp", Opcode: 0xf0000100, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 32:21..28
+ {Name: "xssubdp", Opcode: 0xf0000140, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 40:21..28
+ {Name: "xsmuldp", Opcode: 0xf0000180, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 48:21..28
+ {Name: "xsdivdp", Opcode: 0xf00001c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 56:21..28
+ {Name: "xvaddsp", Opcode: 0xf0000200, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 64:21..28
+ {Name: "xvsubsp", Opcode: 0xf0000240, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 72:21..28
+ {Name: "xvmulsp", Opcode: 0xf0000280, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 80:21..28
+ {Name: "xvdivsp", Opcode: 0xf00002c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 88:21..28
+ {Name: "xvadddp", Opcode: 0xf0000300, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 96:21..28
+ {Name: "xvsubdp", Opcode: 0xf0000340, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 104:21..28
+ {Name: "xvmuldp", Opcode: 0xf0000380, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 112:21..28
+ {Name: "xvdivdp", Opcode: 0xf00003c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 120:21..28
+ {Name: "xsmaxcdp", Opcode: 0xf0000400, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 128:21..28
+ {Name: "xsmincdp", Opcode: 0xf0000440, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 136:21..28
+ {Name: "xsmaxjdp", Opcode: 0xf0000480, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 144:21..28
+ {Name: "xsminjdp", Opcode: 0xf00004c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 152:21..28
+ {Name: "xsmaxdp", Opcode: 0xf0000500, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 160:21..28
+ {Name: "xsmindp", Opcode: 0xf0000540, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 168:21..28
+ {Name: "xscpsgndp", Opcode: 0xf0000580, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 176:21..28
+ {Name: "xvmaxsp", Opcode: 0xf0000600, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 192:21..28
+ {Name: "xvminsp", Opcode: 0xf0000640, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 200:21..28
+ {Name: "xvcpsgnsp", Opcode: 0xf0000680, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 208:21..28
+ {Name: "xviexpsp", Opcode: 0xf00006c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 216:21..28
+ {Name: "xvmaxdp", Opcode: 0xf0000700, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 224:21..28
+ {Name: "xvmindp", Opcode: 0xf0000740, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 232:21..28
+ {Name: "xvcpsgndp", Opcode: 0xf0000780, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 240:21..28
+ {Name: "xviexpdp", Opcode: 0xf00007c0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 248:21..28
+ {Name: "xsmaddasp", Opcode: 0xf0000008, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21..28
+ {Name: "xsmaddmsp", Opcode: 0xf0000048, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 9:21..28
+ {Name: "xsmsubasp", Opcode: 0xf0000088, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 17:21..28
+ {Name: "xsmsubmsp", Opcode: 0xf00000c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 25:21..28
+ {Name: "xsmaddadp", Opcode: 0xf0000108, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 33:21..28
+ {Name: "xsmaddmdp", Opcode: 0xf0000148, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 41:21..28
+ {Name: "xsmsubadp", Opcode: 0xf0000188, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 49:21..28
+ {Name: "xsmsubmdp", Opcode: 0xf00001c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 57:21..28
+ {Name: "xvmaddasp", Opcode: 0xf0000208, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 65:21..28
+ {Name: "xvmaddmsp", Opcode: 0xf0000248, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 73:21..28
+ {Name: "xvmsubasp", Opcode: 0xf0000288, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 81:21..28
+ {Name: "xvmsubmsp", Opcode: 0xf00002c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 89:21..28
+ {Name: "xvmaddadp", Opcode: 0xf0000308, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 97:21..28
+ {Name: "xvmaddmdp", Opcode: 0xf0000348, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 105:21..28
+ {Name: "xvmsubadp", Opcode: 0xf0000388, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 113:21..28
+ {Name: "xvmsubmdp", Opcode: 0xf00003c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 121:21..28
+ {Name: "xsnmaddasp", Opcode: 0xf0000408, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 129:21..28
+ {Name: "xsnmaddmsp", Opcode: 0xf0000448, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 137:21..28
+ {Name: "xsnmsubasp", Opcode: 0xf0000488, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 145:21..28
+ {Name: "xsnmsubmsp", Opcode: 0xf00004c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 153:21..28
+ {Name: "xsnmaddadp", Opcode: 0xf0000508, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 161:21..28
+ {Name: "xsnmaddmdp", Opcode: 0xf0000548, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 169:21..28
+ {Name: "xsnmsubadp", Opcode: 0xf0000588, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 177:21..28
+ {Name: "xsnmsubmdp", Opcode: 0xf00005c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 185:21..28
+ {Name: "xvnmaddasp", Opcode: 0xf0000608, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 193:21..28
+ {Name: "xvnmaddmsp", Opcode: 0xf0000648, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 201:21..28
+ {Name: "xvnmsubasp", Opcode: 0xf0000688, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 209:21..28
+ {Name: "xvnmsubmsp", Opcode: 0xf00006c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 217:21..28
+ {Name: "xvnmaddadp", Opcode: 0xf0000708, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 225:21..28
+ {Name: "xvnmaddmdp", Opcode: 0xf0000748, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 233:21..28
+ {Name: "xvnmsubadp", Opcode: 0xf0000788, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 241:21..28
+ {Name: "xvnmsubmdp", Opcode: 0xf00007c8, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 249:21..28
+ {Name: "xxsldwi", Opcode: 0xf0000010, Mask: 0xfc0004f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "SHW": powerpc.InsnBits{22, 2}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21..21 2:24..28
+ {Name: "xxpermdi", Opcode: 0xf0000050, Mask: 0xfc0004f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "DM": powerpc.InsnBits{22, 2}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21..21 10:24..28
+ {Name: "xxmrghw", Opcode: 0xf0000090, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 18:21..28
+ {Name: "xxperm", Opcode: 0xf00000d0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 26:21..28
+ {Name: "xxmrglw", Opcode: 0xf0000190, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 50:21..28
+ {Name: "xxpermr", Opcode: 0xf00001d0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 58:21..28
+ {Name: "xxspltw", Opcode: 0xf0000290, Mask: 0xfc1c07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}, "UIM": powerpc.InsnBits{14, 2}}}, // 60:0..5 0:11..13(///) 164:21..29
+ {Name: "xxspltib", Opcode: 0xf00002d0, Mask: 0xfc1807fe, Fields: map[string]powerpc.InsnBits{"IMM8": powerpc.InsnBits{13, 8}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..12 360:21..30
+ {Name: "xxland", Opcode: 0xf0000410, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 130:21..28
+ {Name: "xxlandc", Opcode: 0xf0000450, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 138:21..28
+ {Name: "xxlor", Opcode: 0xf0000490, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 146:21..28
+ {Name: "xxlxor", Opcode: 0xf00004d0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 154:21..28
+ {Name: "xxlnor", Opcode: 0xf0000510, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 162:21..28
+ {Name: "xxlorc", Opcode: 0xf0000550, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 170:21..28
+ {Name: "xxlnand", Opcode: 0xf0000590, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 178:21..28
+ {Name: "xxleqv", Opcode: 0xf00005d0, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 186:21..28
+ {Name: "xxextractuw", Opcode: 0xf0000294, Mask: 0xfc1007fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}, "UIM": powerpc.InsnBits{12, 4}}}, // 60:0..5 0:11..11(///) 165:21..29
+ {Name: "xxinsertw", Opcode: 0xf00002d4, Mask: 0xfc1007fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}, "UIM": powerpc.InsnBits{12, 4}}}, // 60:0..5 0:11..11(///) 181:21..29
+ {Name: "xscmpeqdp", Opcode: 0xf0000018, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 3:21..28
+ {Name: "xscmpgtdp", Opcode: 0xf0000058, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 11:21..28
+ {Name: "xscmpgedp", Opcode: 0xf0000098, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 19:21..28
+ {Name: "xscmpudp", Opcode: 0xf0000118, Mask: 0xfc6007f9, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 35:21..28 0:31..31(///)
+ {Name: "xscmpodp", Opcode: 0xf0000158, Mask: 0xfc6007f9, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 43:21..28 0:31..31(///)
+ {Name: "xscmpexpdp", Opcode: 0xf00001d8, Mask: 0xfc6007f9, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 59:21..28 0:31..31(///)
+ {Name: "xvcmpeqsp", Opcode: 0xf0000218, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21(RC) 67:22..28
+ {Name: "xvcmpeqsp.", Opcode: 0xf0000618, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21(RC) 67:22..28
+ {Name: "xvcmpgtsp", Opcode: 0xf0000258, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21(RC) 75:22..28
+ {Name: "xvcmpgtsp.", Opcode: 0xf0000658, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21(RC) 75:22..28
+ {Name: "xvcmpgesp", Opcode: 0xf0000298, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21(RC) 83:22..28
+ {Name: "xvcmpgesp.", Opcode: 0xf0000698, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21(RC) 83:22..28
+ {Name: "xvcmpeqdp", Opcode: 0xf0000318, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21(RC) 99:22..28
+ {Name: "xvcmpeqdp.", Opcode: 0xf0000718, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21(RC) 99:22..28
+ {Name: "xvcmpgtdp", Opcode: 0xf0000358, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21(RC) 107:22..28
+ {Name: "xvcmpgtdp.", Opcode: 0xf0000758, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21(RC) 107:22..28
+ {Name: "xvcmpgedp", Opcode: 0xf0000398, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:21(RC) 115:22..28
+ {Name: "xvcmpgedp.", Opcode: 0xf0000798, Mask: 0xfc0007f8, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:21(RC) 115:22..28
+ {Name: "xscvdpuxws", Opcode: 0xf0000120, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 72:21..29
+ {Name: "xscvdpsxws", Opcode: 0xf0000160, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 88:21..29
+ {Name: "xvcvspuxws", Opcode: 0xf0000220, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 136:21..29
+ {Name: "xvcvspsxws", Opcode: 0xf0000260, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 152:21..29
+ {Name: "xvcvuxwsp", Opcode: 0xf00002a0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 168:21..29
+ {Name: "xvcvsxwsp", Opcode: 0xf00002e0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 184:21..29
+ {Name: "xvcvdpuxws", Opcode: 0xf0000320, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 200:21..29
+ {Name: "xvcvdpsxws", Opcode: 0xf0000360, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 216:21..29
+ {Name: "xvcvuxwdp", Opcode: 0xf00003a0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 232:21..29
+ {Name: "xvcvsxwdp", Opcode: 0xf00003e0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 248:21..29
+ {Name: "xscvuxdsp", Opcode: 0xf00004a0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 296:21..29
+ {Name: "xscvsxdsp", Opcode: 0xf00004e0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 312:21..29
+ {Name: "xscvdpuxds", Opcode: 0xf0000520, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 328:21..29
+ {Name: "xscvdpsxds", Opcode: 0xf0000560, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 344:21..29
+ {Name: "xscvuxddp", Opcode: 0xf00005a0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 360:21..29
+ {Name: "xscvsxddp", Opcode: 0xf00005e0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 376:21..29
+ {Name: "xvcvspuxds", Opcode: 0xf0000620, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 392:21..29
+ {Name: "xvcvspsxds", Opcode: 0xf0000660, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 408:21..29
+ {Name: "xvcvuxdsp", Opcode: 0xf00006a0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 424:21..29
+ {Name: "xvcvsxdsp", Opcode: 0xf00006e0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 440:21..29
+ {Name: "xvcvdpuxds", Opcode: 0xf0000720, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 456:21..29
+ {Name: "xvcvdpsxds", Opcode: 0xf0000760, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 472:21..29
+ {Name: "xvcvuxddp", Opcode: 0xf00007a0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 488:21..29
+ {Name: "xvcvsxddp", Opcode: 0xf00007e0, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 504:21..29
+ {Name: "xsrdpi", Opcode: 0xf0000124, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 73:21..29
+ {Name: "xsrdpiz", Opcode: 0xf0000164, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 89:21..29
+ {Name: "xsrdpip", Opcode: 0xf00001a4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 105:21..29
+ {Name: "xsrdpim", Opcode: 0xf00001e4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 121:21..29
+ {Name: "xvrspi", Opcode: 0xf0000224, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 137:21..29
+ {Name: "xvrspiz", Opcode: 0xf0000264, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 153:21..29
+ {Name: "xvrspip", Opcode: 0xf00002a4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 169:21..29
+ {Name: "xvrspim", Opcode: 0xf00002e4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 185:21..29
+ {Name: "xvrdpi", Opcode: 0xf0000324, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 201:21..29
+ {Name: "xvrdpiz", Opcode: 0xf0000364, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 217:21..29
+ {Name: "xvrdpip", Opcode: 0xf00003a4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 233:21..29
+ {Name: "xvrdpim", Opcode: 0xf00003e4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 249:21..29
+ {Name: "xscvdpsp", Opcode: 0xf0000424, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 265:21..29
+ {Name: "xsrsp", Opcode: 0xf0000464, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 281:21..29
+ {Name: "xscvspdp", Opcode: 0xf0000524, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 329:21..29
+ {Name: "xsabsdp", Opcode: 0xf0000564, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 345:21..29
+ {Name: "xsnabsdp", Opcode: 0xf00005a4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 361:21..29
+ {Name: "xsnegdp", Opcode: 0xf00005e4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 377:21..29
+ {Name: "xvcvdpsp", Opcode: 0xf0000624, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 393:21..29
+ {Name: "xvabssp", Opcode: 0xf0000664, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 409:21..29
+ {Name: "xvnabssp", Opcode: 0xf00006a4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 425:21..29
+ {Name: "xvnegsp", Opcode: 0xf00006e4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 441:21..29
+ {Name: "xvcvspdp", Opcode: 0xf0000724, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 457:21..29
+ {Name: "xvabsdp", Opcode: 0xf0000764, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 473:21..29
+ {Name: "xvnabsdp", Opcode: 0xf00007a4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 489:21..29
+ {Name: "xvnegdp", Opcode: 0xf00007e4, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 505:21..29
+ {Name: "xsrsqrtesp", Opcode: 0xf0000028, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 10:21..29
+ {Name: "xsresp", Opcode: 0xf0000068, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 26:21..29
+ {Name: "xsrsqrtedp", Opcode: 0xf0000128, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 74:21..29
+ {Name: "xsredp", Opcode: 0xf0000168, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 90:21..29
+ {Name: "xstsqrtdp", Opcode: 0xf00001a8, Mask: 0xfc7f07fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 0:11..15(///) 106:21..29 0:31..31(///)
+ {Name: "xstdivdp", Opcode: 0xf00001e8, Mask: 0xfc6007f9, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 61:21..28 0:31..31(///)
+ {Name: "xvrsqrtesp", Opcode: 0xf0000228, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 138:21..29
+ {Name: "xvresp", Opcode: 0xf0000268, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 154:21..29
+ {Name: "xvtsqrtsp", Opcode: 0xf00002a8, Mask: 0xfc7f07fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 0:11..15(///) 170:21..29 0:31..31(///)
+ {Name: "xvtdivsp", Opcode: 0xf00002e8, Mask: 0xfc6007f9, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 93:21..28 0:31..31(///)
+ {Name: "xvrsqrtedp", Opcode: 0xf0000328, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 202:21..29
+ {Name: "xvredp", Opcode: 0xf0000368, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 218:21..29
+ {Name: "xvtsqrtdp", Opcode: 0xf00003a8, Mask: 0xfc7f07fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 0:11..15(///) 234:21..29 0:31..31(///)
+ {Name: "xvtdivdp", Opcode: 0xf00003e8, Mask: 0xfc6007f9, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}}}, // 60:0..5 0:9..10(///) 125:21..28 0:31..31(///)
+ {Name: "xststdcsp", Opcode: 0xf00004a8, Mask: 0xfc0007fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}, "DCMX": powerpc.InsnBits{9, 7}}}, // 60:0..5 298:21..29 0:31..31(///)
+ {Name: "xststdcdp", Opcode: 0xf00005a8, Mask: 0xfc0007fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BF": powerpc.InsnBits{6, 3}, "BX": powerpc.InsnBits{30, 1}, "DCMX": powerpc.InsnBits{9, 7}}}, // 60:0..5 362:21..29 0:31..31(///)
+ {Name: "xvtstdcsp", Opcode: 0xf00006a8, Mask: 0xfc0007b8, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "DC": powerpc.InsnBits{25, 1}, "DM": powerpc.InsnBits{29, 1}, "DX": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 13:21..24 5:26..28
+ {Name: "xvtstdcdp", Opcode: 0xf00007a8, Mask: 0xfc0007b8, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "DC": powerpc.InsnBits{25, 1}, "DM": powerpc.InsnBits{29, 1}, "DX": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 15:21..24 5:26..28
+ {Name: "xssqrtsp", Opcode: 0xf000002c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 11:21..29
+ {Name: "xssqrtdp", Opcode: 0xf000012c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 75:21..29
+ {Name: "xsrdpic", Opcode: 0xf00001ac, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 107:21..29
+ {Name: "xvsqrtsp", Opcode: 0xf000022c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 139:21..29
+ {Name: "xvrspic", Opcode: 0xf00002ac, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 171:21..29
+ {Name: "xvsqrtdp", Opcode: 0xf000032c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 203:21..29
+ {Name: "xvrdpic", Opcode: 0xf00003ac, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 235:21..29
+ {Name: "xscvdpspn", Opcode: 0xf000042c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 267:21..29
+ {Name: "xscvspdpn", Opcode: 0xf000052c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15(///) 331:21..29
+ {Name: "xsxexpdp", Opcode: 0xf000056c, Mask: 0xfc1f07fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "RT": powerpc.InsnBits{6, 5}}}, // 60:0..5 0:11..15 347:21..29 0:31..31(///)
+ {Name: "xsxsigdp", Opcode: 0xf001056c, Mask: 0xfc1f07fd, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "RT": powerpc.InsnBits{6, 5}}}, // 60:0..5 1:11..15 347:21..29 0:31..31(///)
+ {Name: "xscvhpdp", Opcode: 0xf010056c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 16:11..15 347:21..29
+ {Name: "xscvdphp", Opcode: 0xf011056c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 17:11..15 347:21..29
+ {Name: "xsiexpdp", Opcode: 0xf000072c, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RA": powerpc.InsnBits{11, 5}, "RB": powerpc.InsnBits{16, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 918:21..30
+ {Name: "xvxexpdp", Opcode: 0xf000076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 0:11..15 475:21..29
+ {Name: "xvxsigdp", Opcode: 0xf001076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 1:11..15 475:21..29
+ {Name: "xxbrh", Opcode: 0xf007076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 7:11..15 475:21..29
+ {Name: "xvxexpsp", Opcode: 0xf008076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 8:11..15 475:21..29
+ {Name: "xvxsigsp", Opcode: 0xf009076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 9:11..15 475:21..29
+ {Name: "xxbrw", Opcode: 0xf00f076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 15:11..15 475:21..29
+ {Name: "xxbrd", Opcode: 0xf017076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 23:11..15 475:21..29
+ {Name: "xvcvhpsp", Opcode: 0xf018076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 24:11..15 475:21..29
+ {Name: "xvcvsphp", Opcode: 0xf019076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 25:11..15 475:21..29
+ {Name: "xxbrq", Opcode: 0xf01f076c, Mask: 0xfc1f07fc, Fields: map[string]powerpc.InsnBits{"B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 31:11..15 475:21..29
+ {Name: "xxsel", Opcode: 0xf0000030, Mask: 0xfc000030, Fields: map[string]powerpc.InsnBits{"A": powerpc.InsnBits{11, 5}, "AX": powerpc.InsnBits{29, 1}, "B": powerpc.InsnBits{16, 5}, "BX": powerpc.InsnBits{30, 1}, "C": powerpc.InsnBits{21, 5}, "CX": powerpc.InsnBits{28, 1}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{31, 1}}}, // 60:0..5 3:26..27
+ {Name: "stfdp", Opcode: 0xf4000000, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "FRSP": powerpc.InsnBits{6, 5}, "RA": powerpc.InsnBits{11, 5}}}, // 61:0..5 0:30..31
+ {Name: "lxv", Opcode: 0xf4000001, Mask: 0xfc000007, Fields: map[string]powerpc.InsnBits{"DQ": powerpc.InsnBits{16, 12}, "RA": powerpc.InsnBits{11, 5}, "T": powerpc.InsnBits{6, 5}, "TX": powerpc.InsnBits{28, 1}}}, // 61:0..5 1:29..31
+ {Name: "stxsd", Opcode: 0xf4000002, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 61:0..5 2:30..31
+ {Name: "stxssp", Opcode: 0xf4000003, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "VRS": powerpc.InsnBits{6, 5}}}, // 61:0..5 3:30..31
+ {Name: "stxv", Opcode: 0xf4000005, Mask: 0xfc000007, Fields: map[string]powerpc.InsnBits{"DQ": powerpc.InsnBits{16, 12}, "RA": powerpc.InsnBits{11, 5}, "S": powerpc.InsnBits{6, 5}, "SX": powerpc.InsnBits{28, 1}}}, // 61:0..5 5:29..31
+ {Name: "std", Opcode: 0xf8000000, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 62:0..5 0:30..31
+ {Name: "stdu", Opcode: 0xf8000001, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "RS": powerpc.InsnBits{6, 5}}}, // 62:0..5 1:30..31
+ {Name: "stq", Opcode: 0xf8000002, Mask: 0xfc000003, Fields: map[string]powerpc.InsnBits{"DS": powerpc.InsnBits{16, 14}, "RA": powerpc.InsnBits{11, 5}, "RSP": powerpc.InsnBits{6, 5}}}, // 62:0..5 2:30..31
+ {Name: "fcmpu", Opcode: 0xfc000000, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 0:21..30 0:31..31(///)
+ {Name: "fcmpo", Opcode: 0xfc000040, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 32:21..30 0:31..31(///)
+ {Name: "mcrfs", Opcode: 0xfc000080, Mask: 0xfc63ffff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "BFA": powerpc.InsnBits{11, 3}}}, // 63:0..5 0:9..10(///) 0:14..15(///) 0:16..20(///) 64:21..30 0:31..31(///)
+ {Name: "ftdiv", Opcode: 0xfc000100, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 128:21..30 0:31..31(///)
+ {Name: "ftsqrt", Opcode: 0xfc000140, Mask: 0xfc7f07ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 0:11..15(///) 160:21..30 0:31..31(///)
+ {Name: "daddq", Opcode: 0xfc000004, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:21..30 0:31(RC)
+ {Name: "daddq.", Opcode: 0xfc000005, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:21..30 1:31(RC)
+ {Name: "dmulq", Opcode: 0xfc000044, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 34:21..30 0:31(RC)
+ {Name: "dmulq.", Opcode: 0xfc000045, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 34:21..30 1:31(RC)
+ {Name: "dscliq", Opcode: 0xfc000084, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRTP": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 63:0..5 66:22..30 0:31(RC)
+ {Name: "dscliq.", Opcode: 0xfc000085, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRTP": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 63:0..5 66:22..30 1:31(RC)
+ {Name: "dscriq", Opcode: 0xfc0000c4, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRTP": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 63:0..5 98:22..30 0:31(RC)
+ {Name: "dscriq.", Opcode: 0xfc0000c5, Mask: 0xfc0003ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRTP": powerpc.InsnBits{6, 5}, "SH": powerpc.InsnBits{16, 6}}}, // 63:0..5 98:22..30 1:31(RC)
+ {Name: "dcmpoq", Opcode: 0xfc000082, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 130:21..31
+ {Name: "dtstexq", Opcode: 0xfc000144, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 162:21..30 0:31..31(///)
+ {Name: "dtstdcq", Opcode: 0xfc000184, Mask: 0xfc6003ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "DCM": powerpc.InsnBits{16, 6}, "FRAP": powerpc.InsnBits{11, 5}}}, // 63:0..5 0:9..10(///) 194:22..30 0:31..31(///)
+ {Name: "dtstdgq", Opcode: 0xfc0001c4, Mask: 0xfc6003ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "DGM": powerpc.InsnBits{16, 6}, "FRAP": powerpc.InsnBits{11, 5}}}, // 63:0..5 0:9..10(///) 226:22..30 0:31..31(///)
+ {Name: "dctqpq", Opcode: 0xfc000204, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 258:21..30 0:31(RC)
+ {Name: "dctqpq.", Opcode: 0xfc000205, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 258:21..30 1:31(RC)
+ {Name: "dctfixq", Opcode: 0xfc000244, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 290:21..30 0:31(RC)
+ {Name: "dctfixq.", Opcode: 0xfc000245, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 290:21..30 1:31(RC)
+ {Name: "ddedpdq", Opcode: 0xfc000284, Mask: 0xfc0707ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "SP": powerpc.InsnBits{11, 2}}}, // 63:0..5 0:13..15(///) 322:21..30 0:31(RC)
+ {Name: "ddedpdq.", Opcode: 0xfc000285, Mask: 0xfc0707ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "SP": powerpc.InsnBits{11, 2}}}, // 63:0..5 0:13..15(///) 322:21..30 1:31(RC)
+ {Name: "dxexq", Opcode: 0xfc0002c4, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 354:21..30 0:31(RC)
+ {Name: "dxexq.", Opcode: 0xfc0002c5, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 354:21..30 1:31(RC)
+ {Name: "dsubq", Opcode: 0xfc000404, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 514:21..30 0:31(RC)
+ {Name: "dsubq.", Opcode: 0xfc000405, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 514:21..30 1:31(RC)
+ {Name: "ddivq", Opcode: 0xfc000444, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 546:21..30 0:31(RC)
+ {Name: "ddivq.", Opcode: 0xfc000445, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 546:21..30 1:31(RC)
+ {Name: "dcmpuq", Opcode: 0xfc000504, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 642:21..30 0:31..31(///)
+ {Name: "dtstsfq", Opcode: 0xfc000544, Mask: 0xfc4007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRA": powerpc.InsnBits{10, 6}, "FRBP": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..9(///) 674:21..30 0:31..31(///)
+ {Name: "drdpq", Opcode: 0xfc000604, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 770:21..30 0:31(RC)
+ {Name: "drdpq.", Opcode: 0xfc000605, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 770:21..30 1:31(RC)
+ {Name: "dcffixq", Opcode: 0xfc000644, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 802:21..30 0:31(RC)
+ {Name: "dcffixq.", Opcode: 0xfc000645, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 802:21..30 1:31(RC)
+ {Name: "denbcdq", Opcode: 0xfc000684, Mask: 0xfc0f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "S": powerpc.InsnBits{11, 1}}}, // 63:0..5 0:12..15(///) 834:21..30 0:31(RC)
+ {Name: "denbcdq.", Opcode: 0xfc000685, Mask: 0xfc0f07ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "S": powerpc.InsnBits{11, 1}}}, // 63:0..5 0:12..15(///) 834:21..30 1:31(RC)
+ {Name: "diexq", Opcode: 0xfc0006c4, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 866:21..30 0:31(RC)
+ {Name: "diexq.", Opcode: 0xfc0006c5, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}}}, // 63:0..5 866:21..30 1:31(RC)
+ {Name: "dquaq", Opcode: 0xfc000006, Mask: 0xfc0001fe, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 3:23..30
+ {Name: "dquaq.", Opcode: 0xfc000006, Mask: 0xfc0001fe, Fields: map[string]powerpc.InsnBits{"FRAP": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 3:23..30
+ {Name: "drrndq", Opcode: 0xfc000046, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 35:23..30 0:31(RC)
+ {Name: "drrndq.", Opcode: 0xfc000047, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 35:23..30 1:31(RC)
+ {Name: "dquaiq", Opcode: 0xfc000086, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}, "TE": powerpc.InsnBits{11, 5}}}, // 63:0..5 67:23..30 0:31(RC)
+ {Name: "dquaiq.", Opcode: 0xfc000087, Mask: 0xfc0001ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "RMC": powerpc.InsnBits{21, 2}, "TE": powerpc.InsnBits{11, 5}}}, // 63:0..5 67:23..30 1:31(RC)
+ {Name: "drintxq", Opcode: 0xfc0000c6, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 0:11..14(///) 99:23..30 0:31(RC)
+ {Name: "drintxq.", Opcode: 0xfc0000c7, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 0:11..14(///) 99:23..30 1:31(RC)
+ {Name: "drintnq", Opcode: 0xfc0001c6, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 0:11..14(///) 227:23..30 0:31(RC)
+ {Name: "drintnq.", Opcode: 0xfc0001c7, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"FRBP": powerpc.InsnBits{16, 5}, "FRTP": powerpc.InsnBits{6, 5}, "R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}}}, // 63:0..5 0:11..14(///) 227:23..30 1:31(RC)
+ {Name: "dtstsfiq", Opcode: 0xfc000546, Mask: 0xfc4007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "FRBP": powerpc.InsnBits{16, 5}, "UIM": powerpc.InsnBits{10, 6}}}, // 63:0..5 0:9..9(///) 675:21..30 0:31..31(///)
+ {Name: "xsaddqp", Opcode: 0xfc000008, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 4:21..30
+ {Name: "xsaddqpo", Opcode: 0xfc000008, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 4:21..30
+ {Name: "xsmulqp", Opcode: 0xfc000048, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 36:21..30
+ {Name: "xsmulqpo", Opcode: 0xfc000048, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 36:21..30
+ {Name: "xscpsgnqp", Opcode: 0xfc0000c8, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 100:21..30 0:31..31(///)
+ {Name: "xscmpoqp", Opcode: 0xfc000108, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 132:21..30 0:31..31(///)
+ {Name: "xscmpexpqp", Opcode: 0xfc000148, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 164:21..30 0:31..31(///)
+ {Name: "xsmaddqp", Opcode: 0xfc000308, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 388:21..30
+ {Name: "xsmaddqpo", Opcode: 0xfc000309, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 388:21..30 1:31(RO)
+ {Name: "xsmsubqp", Opcode: 0xfc000348, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 420:21..30
+ {Name: "xsmsubqpo", Opcode: 0xfc000349, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 420:21..30 1:31(RO)
+ {Name: "xsnmaddqp", Opcode: 0xfc000388, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 452:21..30
+ {Name: "xsnmaddqpo", Opcode: 0xfc000389, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 452:21..30 1:31(RO)
+ {Name: "xsnmsubqp", Opcode: 0xfc0003c8, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 484:21..30
+ {Name: "xsnmsubqpo", Opcode: 0xfc0003c9, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 484:21..30 1:31(RO)
+ {Name: "xssubqp", Opcode: 0xfc000408, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 516:21..30
+ {Name: "xssubqpo", Opcode: 0xfc000408, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 516:21..30
+ {Name: "xsdivqp", Opcode: 0xfc000448, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 548:21..30
+ {Name: "xsdivqpo", Opcode: 0xfc000448, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 548:21..30
+ {Name: "xscmpuqp", Opcode: 0xfc000508, Mask: 0xfc6007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 0:9..10(///) 644:21..30 0:31..31(///)
+ {Name: "xststdcqp", Opcode: 0xfc000588, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "DCMX": powerpc.InsnBits{9, 7}, "VRB": powerpc.InsnBits{16, 5}}}, // 63:0..5 708:21..30 0:31..31(///)
+ {Name: "xsabsqp", Opcode: 0xfc000648, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15 804:21..30 0:31..31(///)
+ {Name: "xsxexpqp", Opcode: 0xfc020648, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:11..15 804:21..30 0:31..31(///)
+ {Name: "xsnabsqp", Opcode: 0xfc080648, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 8:11..15 804:21..30 0:31..31(///)
+ {Name: "xsnegqp", Opcode: 0xfc100648, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 16:11..15 804:21..30 0:31..31(///)
+ {Name: "xsxsigqp", Opcode: 0xfc120648, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 18:11..15 804:21..30 0:31..31(///)
+ {Name: "xssqrtqp", Opcode: 0xfc1b0648, Mask: 0xfc1f07fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 27:11..15 804:21..30
+ {Name: "xssqrtqpo", Opcode: 0xfc1b0648, Mask: 0xfc1f07fe, Fields: map[string]powerpc.InsnBits{"RO": powerpc.InsnBits{31, 1}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 27:11..15 804:21..30
+ {Name: "xscvqpuwz", Opcode: 0xfc010688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 1:11..15 836:21..30 0:31..31(///)
+ {Name: "xscvudqp", Opcode: 0xfc020688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:11..15 836:21..30 0:31..31(///)
+ {Name: "xscvqpswz", Opcode: 0xfc090688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 9:11..15 836:21..30 0:31..31(///)
+ {Name: "xscvsdqp", Opcode: 0xfc0a0688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 10:11..15 836:21..30 0:31..31(///)
+ {Name: "xscvqpudz", Opcode: 0xfc110688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 17:11..15 836:21..30 0:31..31(///)
+ {Name: "xscvqpdp", Opcode: 0xfc140688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 20:11..15 836:21..30 0:31(RO)
+ {Name: "xscvqpdpo", Opcode: 0xfc140689, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 20:11..15 836:21..30 1:31(RO)
+ {Name: "xscvdpqp", Opcode: 0xfc160688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 22:11..15 836:21..30 0:31..31(///)
+ {Name: "xscvqpsdz", Opcode: 0xfc190688, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 25:11..15 836:21..30 0:31..31(///)
+ {Name: "xsiexpqp", Opcode: 0xfc0006c8, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"VRA": powerpc.InsnBits{11, 5}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 868:21..30 0:31..31(///)
+ {Name: "xsrqpi", Opcode: 0xfc00000a, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..14(///) 5:23..30 0:31(EX)
+ {Name: "xsrqpix", Opcode: 0xfc00000b, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..14(///) 5:23..30 1:31(EX)
+ {Name: "xsrqpxp", Opcode: 0xfc00004a, Mask: 0xfc1e01ff, Fields: map[string]powerpc.InsnBits{"R": powerpc.InsnBits{15, 1}, "RMC": powerpc.InsnBits{21, 2}, "VRB": powerpc.InsnBits{16, 5}, "VRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..14(///) 37:23..30 0:31..31(///)
+ {Name: "mtfsb1", Opcode: 0xfc00004c, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"BT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:16..20(///) 38:21..30 0:31(RC)
+ {Name: "mtfsb1.", Opcode: 0xfc00004d, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"BT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:16..20(///) 38:21..30 1:31(RC)
+ {Name: "mtfsb0", Opcode: 0xfc00008c, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"BT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:16..20(///) 70:21..30 0:31(RC)
+ {Name: "mtfsb0.", Opcode: 0xfc00008d, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"BT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:16..20(///) 70:21..30 1:31(RC)
+ {Name: "mtfsfi", Opcode: 0xfc00010c, Mask: 0xfc7e0fff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "U": powerpc.InsnBits{16, 4}, "W": powerpc.InsnBits{15, 1}}}, // 63:0..5 0:9..10(///) 0:11..14(///) 0:20..20(///) 134:21..30 0:31(RC)
+ {Name: "mtfsfi.", Opcode: 0xfc00010d, Mask: 0xfc7e0fff, Fields: map[string]powerpc.InsnBits{"BF": powerpc.InsnBits{6, 3}, "U": powerpc.InsnBits{16, 4}, "W": powerpc.InsnBits{15, 1}}}, // 63:0..5 0:9..10(///) 0:11..14(///) 0:20..20(///) 134:21..30 1:31(RC)
+ {Name: "fmrgow", Opcode: 0xfc00068c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 838:21..30 0:31..31(///)
+ {Name: "fmrgew", Opcode: 0xfc00078c, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 966:21..30 0:31..31(///)
+ {Name: "mffs", Opcode: 0xfc00048e, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..12 0:13..15 0:16..20(///) 583:21..30 0:31(RC)
+ {Name: "mffs.", Opcode: 0xfc00048f, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..12 0:13..15 0:16..20(///) 583:21..30 1:31(RC)
+ {Name: "mffsce", Opcode: 0xfc01048e, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..12 1:13..15 0:16..20(///) 583:21..30 0:31..31(///)
+ {Name: "mffscdrn", Opcode: 0xfc14048e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:11..12 4:13..15 583:21..30 0:31..31(///)
+ {Name: "mffscdrni", Opcode: 0xfc15048e, Mask: 0xfc1fc7ff, Fields: map[string]powerpc.InsnBits{"DRM": powerpc.InsnBits{18, 3}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:11..12 5:13..15 0:16..17(///) 583:21..30 0:31..31(///)
+ {Name: "mffscrn", Opcode: 0xfc16048e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 2:11..12 6:13..15 583:21..30 0:31..31(///)
+ {Name: "mffscrni", Opcode: 0xfc17048e, Mask: 0xfc1fe7ff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}, "RM": powerpc.InsnBits{19, 2}}}, // 63:0..5 2:11..12 7:13..15 0:16..18(///) 583:21..30 0:31..31(///)
+ {Name: "mffsl", Opcode: 0xfc18048e, Mask: 0xfc1fffff, Fields: map[string]powerpc.InsnBits{"FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 3:11..12 0:13..15 0:16..20(///) 583:21..30 0:31..31(///)
+ {Name: "mtfsf", Opcode: 0xfc00058e, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FLM": powerpc.InsnBits{7, 8}, "FRB": powerpc.InsnBits{16, 5}, "L": powerpc.InsnBits{6, 1}, "W": powerpc.InsnBits{15, 1}}}, // 63:0..5 711:21..30 0:31(RC)
+ {Name: "mtfsf.", Opcode: 0xfc00058f, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FLM": powerpc.InsnBits{7, 8}, "FRB": powerpc.InsnBits{16, 5}, "L": powerpc.InsnBits{6, 1}, "W": powerpc.InsnBits{15, 1}}}, // 63:0..5 711:21..30 1:31(RC)
+ {Name: "fcpsgn", Opcode: 0xfc000010, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}}}, // 63:0..5 8:21..30
+ {Name: "fcpsgn.", Opcode: 0xfc000010, Mask: 0xfc0007fe, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}, "RC": powerpc.InsnBits{31, 1}}}, // 63:0..5 8:21..30
+ {Name: "fneg", Opcode: 0xfc000050, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 40:21..30 0:31(RC)
+ {Name: "fneg.", Opcode: 0xfc000051, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 40:21..30 1:31(RC)
+ {Name: "fmr", Opcode: 0xfc000090, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 72:21..30 0:31(RC)
+ {Name: "fmr.", Opcode: 0xfc000091, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 72:21..30 1:31(RC)
+ {Name: "fnabs", Opcode: 0xfc000110, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 136:21..30 0:31(RC)
+ {Name: "fnabs.", Opcode: 0xfc000111, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 136:21..30 1:31(RC)
+ {Name: "fabs", Opcode: 0xfc000210, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 264:21..30 0:31(RC)
+ {Name: "fabs.", Opcode: 0xfc000211, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 264:21..30 1:31(RC)
+ {Name: "frin", Opcode: 0xfc000310, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 392:21..30 0:31(RC)
+ {Name: "frin.", Opcode: 0xfc000311, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 392:21..30 1:31(RC)
+ {Name: "friz", Opcode: 0xfc000350, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 424:21..30 0:31(RC)
+ {Name: "friz.", Opcode: 0xfc000351, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 424:21..30 1:31(RC)
+ {Name: "frip", Opcode: 0xfc000390, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 456:21..30 0:31(RC)
+ {Name: "frip.", Opcode: 0xfc000391, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 456:21..30 1:31(RC)
+ {Name: "frim", Opcode: 0xfc0003d0, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 488:21..30 0:31(RC)
+ {Name: "frim.", Opcode: 0xfc0003d1, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 488:21..30 1:31(RC)
+ {Name: "frsp", Opcode: 0xfc000018, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 12:21..30 0:31(RC)
+ {Name: "frsp.", Opcode: 0xfc000019, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 12:21..30 1:31(RC)
+ {Name: "fctiw", Opcode: 0xfc00001c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 14:21..30 0:31(RC)
+ {Name: "fctiw.", Opcode: 0xfc00001d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 14:21..30 1:31(RC)
+ {Name: "fctiwu", Opcode: 0xfc00011c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 142:21..30 0:31(RC)
+ {Name: "fctiwu.", Opcode: 0xfc00011d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 142:21..30 1:31(RC)
+ {Name: "fctid", Opcode: 0xfc00065c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 814:21..30 0:31(RC)
+ {Name: "fctid.", Opcode: 0xfc00065d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 814:21..30 1:31(RC)
+ {Name: "fcfid", Opcode: 0xfc00069c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 846:21..30 0:31(RC)
+ {Name: "fcfid.", Opcode: 0xfc00069d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 846:21..30 1:31(RC)
+ {Name: "fctidu", Opcode: 0xfc00075c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 942:21..30 0:31(RC)
+ {Name: "fctidu.", Opcode: 0xfc00075d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 942:21..30 1:31(RC)
+ {Name: "fcfidu", Opcode: 0xfc00079c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 974:21..30 0:31(RC)
+ {Name: "fcfidu.", Opcode: 0xfc00079d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 974:21..30 1:31(RC)
+ {Name: "fctiwz", Opcode: 0xfc00001e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 15:21..30 0:31(RC)
+ {Name: "fctiwz.", Opcode: 0xfc00001f, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 15:21..30 1:31(RC)
+ {Name: "fctiwuz", Opcode: 0xfc00011e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 143:21..30 0:31(RC)
+ {Name: "fctiwuz.", Opcode: 0xfc00011f, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 143:21..30 1:31(RC)
+ {Name: "fctidz", Opcode: 0xfc00065e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 815:21..30 0:31(RC)
+ {Name: "fctidz.", Opcode: 0xfc00065f, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 815:21..30 1:31(RC)
+ {Name: "fctiduz", Opcode: 0xfc00075e, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 943:21..30 0:31(RC)
+ {Name: "fctiduz.", Opcode: 0xfc00075f, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 943:21..30 1:31(RC)
+ {Name: "fdiv", Opcode: 0xfc000024, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:21..25(///) 18:26..30 0:31(RC)
+ {Name: "fdiv.", Opcode: 0xfc000025, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:21..25(///) 18:26..30 1:31(RC)
+ {Name: "fsub", Opcode: 0xfc000028, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:21..25(///) 20:26..30 0:31(RC)
+ {Name: "fsub.", Opcode: 0xfc000029, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:21..25(///) 20:26..30 1:31(RC)
+ {Name: "fadd", Opcode: 0xfc00002a, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:21..25(///) 21:26..30 0:31(RC)
+ {Name: "fadd.", Opcode: 0xfc00002b, Mask: 0xfc0007ff, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:21..25(///) 21:26..30 1:31(RC)
+ {Name: "fsqrt", Opcode: 0xfc00002c, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:21..25(///) 22:26..30 0:31(RC)
+ {Name: "fsqrt.", Opcode: 0xfc00002d, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:21..25(///) 22:26..30 1:31(RC)
+ {Name: "fsel", Opcode: 0xfc00002e, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 23:26..30 0:31(RC)
+ {Name: "fsel.", Opcode: 0xfc00002f, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 23:26..30 1:31(RC)
+ {Name: "fre", Opcode: 0xfc000030, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:21..25(///) 24:26..30 0:31(RC)
+ {Name: "fre.", Opcode: 0xfc000031, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:21..25(///) 24:26..30 1:31(RC)
+ {Name: "fmul", Opcode: 0xfc000032, Mask: 0xfc00f83f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:16..20(///) 25:26..30 0:31(RC)
+ {Name: "fmul.", Opcode: 0xfc000033, Mask: 0xfc00f83f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:16..20(///) 25:26..30 1:31(RC)
+ {Name: "frsqrte", Opcode: 0xfc000034, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:21..25(///) 26:26..30 0:31(RC)
+ {Name: "frsqrte.", Opcode: 0xfc000035, Mask: 0xfc1f07ff, Fields: map[string]powerpc.InsnBits{"FRB": powerpc.InsnBits{16, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 0:11..15(///) 0:21..25(///) 26:26..30 1:31(RC)
+ {Name: "fmsub", Opcode: 0xfc000038, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 28:26..30 0:31(RC)
+ {Name: "fmsub.", Opcode: 0xfc000039, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 28:26..30 1:31(RC)
+ {Name: "fmadd", Opcode: 0xfc00003a, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 29:26..30 0:31(RC)
+ {Name: "fmadd.", Opcode: 0xfc00003b, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 29:26..30 1:31(RC)
+ {Name: "fnmsub", Opcode: 0xfc00003c, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 30:26..30 0:31(RC)
+ {Name: "fnmsub.", Opcode: 0xfc00003d, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 30:26..30 1:31(RC)
+ {Name: "fnmadd", Opcode: 0xfc00003e, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 31:26..30 0:31(RC)
+ {Name: "fnmadd.", Opcode: 0xfc00003f, Mask: 0xfc00003f, Fields: map[string]powerpc.InsnBits{"FRA": powerpc.InsnBits{11, 5}, "FRB": powerpc.InsnBits{16, 5}, "FRC": powerpc.InsnBits{21, 5}, "FRT": powerpc.InsnBits{6, 5}}}, // 63:0..5 31:26..30 1:31(RC)
+}
diff --git a/pkg/ifuzz/powerpc/powerpc.go b/pkg/ifuzz/powerpc/powerpc.go
new file mode 100644
index 000000000..0dd3a57d6
--- /dev/null
+++ b/pkg/ifuzz/powerpc/powerpc.go
@@ -0,0 +1,165 @@
+// Copyright 2020 syzkaller project authors. All rights reserved.
+// Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
+
+// Package ifuzz allows to generate and mutate PPC64 PowerISA 3.0B machine code.
+
+// The ISA for POWER9 (the latest available at the moment) is at:
+// https://openpowerfoundation.org/?resource_lib=power-isa-version-3-0
+//
+// A script on top of pdftotext was used to produce insns.go:
+// ./powerisa30_to_syz /home/aik/Documents/ppc/power9/PowerISA_public.v3.0B.pdf > 1.go
+// .
+
+package powerpc
+
+import (
+ "encoding/binary"
+ "errors"
+ "fmt"
+ "github.com/google/syzkaller/pkg/ifuzz"
+ "github.com/google/syzkaller/pkg/ifuzz/ifuzzimpl"
+ "math/rand"
+)
+
+type InsnBits struct {
+ Start uint // Big endian bit order.
+ Length uint
+}
+
+type Insn struct {
+ Name string
+ M64 bool // true if the instruction is 64bit _only_.
+ Priv bool
+ Pseudo bool
+ Fields map[string]InsnBits // for ra/rb/rt/si/...
+ Opcode uint32
+ Mask uint32
+
+ generator func(cfg *ifuzz.Config, r *rand.Rand) []byte
+}
+
+type InsnSetPowerPC struct {
+ Insns []*Insn
+ modeInsns [ifuzz.ModeLast][ifuzz.TypeLast][]ifuzz.Insn
+ insnMap map[string]*Insn
+}
+
+func (insnset *InsnSetPowerPC) GetInsns(mode, insntype int) []ifuzz.Insn {
+ return insnset.modeInsns[mode][insntype]
+}
+
+func (insnset *InsnSetPowerPC) Decode(mode int, text []byte) (int, error) {
+ if len(text) < 4 {
+ return 0, errors.New("must be at least 4 bytes")
+ }
+ insn32 := binary.LittleEndian.Uint32(text)
+ for _, ins := range insnset.Insns {
+ if ins.Mask&insn32 == ins.Opcode {
+ return 4, nil
+ }
+ }
+ return 0, fmt.Errorf("unrecognised instruction %08x", insn32)
+}
+
+func (insnset *InsnSetPowerPC) DecodeExt(mode int, text []byte) (int, error) {
+ return 0, fmt.Errorf("no external decoder")
+}
+
+func encodeBits(n uint, f InsnBits) uint32 {
+ mask := uint(1<<f.Length) - 1
+ return uint32((n & mask) << (31 - (f.Start + f.Length - 1)))
+}
+
+func (insn *Insn) EncodeParam(v map[string]uint, r *rand.Rand) []byte {
+ insn32 := insn.Opcode
+ for reg, bits := range insn.Fields {
+ if val, ok := v[reg]; ok {
+ insn32 |= encodeBits(val, bits)
+ } else if r != nil {
+ insn32 |= encodeBits(uint(r.Intn(1<<16)), bits)
+ }
+ }
+
+ ret := make([]byte, 4)
+ binary.LittleEndian.PutUint32(ret, insn32)
+ return ret
+}
+
+func (insn Insn) Encode(cfg *ifuzz.Config, r *rand.Rand) []byte {
+ if insn.Pseudo {
+ return insn.generator(cfg, r)
+ }
+
+ return insn.EncodeParam(nil, r)
+}
+
+func Register(insns []*Insn) {
+ var insnset InsnSetPowerPC
+
+ insnset.Insns = insns
+ if len(insnset.Insns) == 0 {
+ panic("no instructions")
+ }
+ insnset.insnMap = make(map[string]*Insn)
+ for _, insn := range insnset.Insns {
+ insnset.insnMap[insn.GetName()] = insn
+ }
+ insnset.initPseudo()
+ for mode := 0; mode < ifuzz.ModeLast; mode++ {
+ for _, insn := range insnset.Insns {
+ if insn.GetMode()&(1<<uint(mode)) == 0 {
+ continue
+ }
+ if insn.GetPseudo() {
+ insnset.modeInsns[mode][ifuzz.TypeExec] =
+ append(insnset.modeInsns[mode][ifuzz.TypeExec], ifuzz.Insn(insn))
+ } else if insn.GetPriv() {
+ insnset.modeInsns[mode][ifuzz.TypePriv] =
+ append(insnset.modeInsns[mode][ifuzz.TypePriv], ifuzz.Insn(insn))
+ insnset.modeInsns[mode][ifuzz.TypeAll] =
+ append(insnset.modeInsns[mode][ifuzz.TypeAll], ifuzz.Insn(insn))
+ } else {
+ insnset.modeInsns[mode][ifuzz.TypeUser] =
+ append(insnset.modeInsns[mode][ifuzz.TypeUser], ifuzz.Insn(insn))
+ insnset.modeInsns[mode][ifuzz.TypeAll] =
+ append(insnset.modeInsns[mode][ifuzz.TypeAll], ifuzz.Insn(insn))
+ }
+ }
+ }
+ ifuzzimpl.Register(ifuzz.ArchPowerPC, ifuzz.InsnSet(&insnset))
+}
+
+func (insn Insn) GetName() string {
+ return insn.Name
+}
+
+func (insn Insn) GetMode() int {
+ if insn.M64 {
+ return (1 << ifuzz.ModeLong64)
+ }
+ return (1 << ifuzz.ModeLong64) | (1 << ifuzz.ModeProt32)
+}
+
+func (insn Insn) GetPriv() bool {
+ return insn.Priv
+}
+
+func (insn Insn) GetPseudo() bool {
+ return insn.Pseudo
+}
+
+func (insn Insn) IsCompatible(cfg *ifuzz.Config) bool {
+ if cfg.Mode < 0 || cfg.Mode >= ifuzz.ModeLast {
+ panic("bad mode")
+ }
+ if insn.Priv && !cfg.Priv {
+ return false
+ }
+ if insn.Pseudo && !cfg.Exec {
+ return false
+ }
+ if insn.M64 && ((1 << uint(cfg.Mode)) != ifuzz.ModeLong64) {
+ return false
+ }
+ return true
+}
diff --git a/pkg/ifuzz/powerpc/pseudo.go b/pkg/ifuzz/powerpc/pseudo.go
new file mode 100644
index 000000000..e39863b32
--- /dev/null
+++ b/pkg/ifuzz/powerpc/pseudo.go
@@ -0,0 +1,108 @@
+// Copyright 2020 syzkaller project authors. All rights reserved.
+// Use of this source code is governed by Apache 2 LICENSE that can be found in the LICENSE file.
+
+package powerpc
+
+import (
+ "github.com/google/syzkaller/pkg/ifuzz"
+ "math/rand"
+)
+
+// nolint:dupl
+func (insnset *InsnSetPowerPC) initPseudo() {
+ insnset.Insns = append(insnset.Insns, &Insn{
+ Name: "PSEUDO_hypercall",
+ Priv: true,
+ Pseudo: true,
+ generator: func(cfg *ifuzz.Config, r *rand.Rand) []byte {
+ gen := makeGen(insnset, cfg, r)
+ gen.sc(1)
+ return gen.text
+ },
+ })
+ insnset.Insns = append(insnset.Insns, &Insn{
+ Name: "PSEUDO_syscall",
+ Priv: true,
+ Pseudo: true,
+ generator: func(cfg *ifuzz.Config, r *rand.Rand) []byte {
+ gen := makeGen(insnset, cfg, r)
+ gen.sc(0)
+ return gen.text
+ },
+ })
+ insnset.Insns = append(insnset.Insns, &Insn{
+ Name: "PSEUDO_ultracall",
+ Priv: true,
+ Pseudo: true,
+ generator: func(cfg *ifuzz.Config, r *rand.Rand) []byte {
+ gen := makeGen(insnset, cfg, r)
+ gen.sc(2)
+ return gen.text
+ },
+ })
+}
+
+type generator struct {
+ imap map[string]*Insn
+ mode int
+ r *rand.Rand
+ text []byte
+}
+
+func makeGen(insnset *InsnSetPowerPC, cfg *ifuzz.Config, r *rand.Rand) *generator {
+ return &generator{
+ imap: insnset.insnMap,
+ mode: cfg.Mode,
+ r: r,
+ }
+}
+
+func (gen *generator) byte(v []byte) {
+ gen.text = append(gen.text, v...)
+}
+
+func (gen *generator) ld64(reg uint, v uint64) {
+ // This is a widely used macro to load immediate on ppc64
+ // #define LOAD64(rn,name)
+ // addis rn,0,name##@highest \ lis rn,name##@highest
+ // ori rn,rn,name##@higher
+ // rldicr rn,rn,32,31
+ // oris rn,rn,name##@h
+ // ori rn,rn,name##@l
+ gen.byte(gen.imap["addis"].EncodeParam(map[string]uint{
+ "RT": reg,
+ "RA": 0, // In "addis", '0' means 0, not GPR0 .
+ "SI": uint((v >> 48) & 0xffff)},
+ nil))
+ gen.byte(gen.imap["ori"].EncodeParam(map[string]uint{
+ "RA": reg,
+ "RS": reg,
+ "UI": uint((v >> 32) & 0xffff)},
+ nil))
+ gen.byte(gen.imap["rldicr"].EncodeParam(map[string]uint{
+ "RA": reg,
+ "RS": reg,
+ "SH": 32,
+ "ME": 31},
+ nil))
+ gen.byte(gen.imap["oris"].EncodeParam(map[string]uint{
+ "RA": reg,
+ "RS": reg,
+ "UI": uint((v >> 16) & 0xffff)},
+ nil))
+ gen.byte(gen.imap["ori"].EncodeParam(map[string]uint{
+ "RA": reg,
+ "RS": reg,
+ "UI": uint(v & 0xffff)},
+ nil))
+}
+
+func (gen *generator) sc(lev uint) {
+ n := gen.r.Intn(9)
+ // Valid hcall humbers at the momemt are: 4..0x450
+ gen.ld64(3, uint64(gen.r.Intn(4+(0x450-4)/4)))
+ for i := 4; i < n+4; i++ {
+ gen.ld64(uint(i), gen.r.Uint64())
+ }
+ gen.byte(gen.imap["sc"].EncodeParam(map[string]uint{"LEV": lev}, nil))
+}
diff --git a/prog/rand.go b/prog/rand.go
index 85998b942..bc23ed427 100644
--- a/prog/rand.go
+++ b/prog/rand.go
@@ -14,7 +14,8 @@ import (
"github.com/google/syzkaller/pkg/ifuzz"
"github.com/google/syzkaller/pkg/ifuzz/ifuzzimpl"
- _ "github.com/google/syzkaller/pkg/ifuzz/x86/generated" // pull in generated instruction descriptions
+ _ "github.com/google/syzkaller/pkg/ifuzz/powerpc/generated" // pull in generated instruction descriptions
+ _ "github.com/google/syzkaller/pkg/ifuzz/x86/generated" // pull in generated instruction descriptions
)
const (
@@ -479,6 +480,9 @@ func createTargetIfuzzConfig(target *Target) *ifuzz.Config {
case "386":
cfg.Mode = ifuzz.ModeProt32
cfg.Arch = ifuzz.ArchX86
+ case "ppc64":
+ cfg.Mode = ifuzz.ModeLong64
+ cfg.Arch = ifuzz.ArchPowerPC
default:
return nil
}
@@ -517,6 +521,9 @@ func createIfuzzConfig(kind TextKind) *ifuzz.Config {
case TextX86bit64:
cfg.Mode = ifuzz.ModeLong64
cfg.Arch = ifuzz.ArchX86
+ case TextPpc64:
+ cfg.Mode = ifuzz.ModeLong64
+ cfg.Arch = ifuzz.ArchPowerPC
default:
panic("unknown text kind")
}
diff --git a/prog/types.go b/prog/types.go
index 4fdb7bc95..482b20e2d 100644
--- a/prog/types.go
+++ b/prog/types.go
@@ -492,6 +492,7 @@ const (
TextX86bit32
TextX86bit64
TextArm64
+ TextPpc64
)
type BufferType struct {
diff --git a/sys/linux/dev_kvm.txt b/sys/linux/dev_kvm.txt
index a38da6086..78615a8b6 100644
--- a/sys/linux/dev_kvm.txt
+++ b/sys/linux/dev_kvm.txt
@@ -157,6 +157,7 @@ kvm_x86_rflags = 1, 2, 4, 16, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384,
# The interface is designed for extensibility so that addition of new options does not invalidate all existing programs.
syz_kvm_setup_cpu$x86(fd fd_kvmvm, cpufd fd_kvmcpu, usermem vma[24], text ptr[in, array[kvm_text_x86, 1]], ntext len[text], flags flags[kvm_setup_flags], opts ptr[in, array[kvm_setup_opt_x86, 0:2]], nopt len[opts])
syz_kvm_setup_cpu$arm64(fd fd_kvmvm, cpufd fd_kvmcpu, usermem vma[24], text ptr[in, array[kvm_text_arm64, 1]], ntext len[text], flags const[0], opts ptr[in, array[kvm_setup_opt_arm64, 1]], nopt len[opts])
+syz_kvm_setup_cpu$ppc64(fd fd_kvmvm, cpufd fd_kvmcpu, usermem vma[24], text ptr[in, array[kvm_text_ppc64, 1]], ntext len[text], flags const[0], opts ptr[in, array[kvm_setup_opt_ppc64, 1]], nopt len[opts])
kvm_text_x86 [
textreal kvm_text_x86_real
@@ -195,6 +196,12 @@ kvm_text_arm64 {
size len[text, intptr]
}
+kvm_text_ppc64 {
+ typ const[0, intptr]
+ text ptr[in, text[ppc64]]
+ size len[text, intptr]
+}
+
kvm_setup_opt_x86 [
cr0 kvm_setup_opt_cr0
cr4 kvm_setup_opt_cr4
@@ -271,6 +278,17 @@ kvm_setup_opt_feature {
val flags[kvm_vcpu_features_arm64, int64]
}
+kvm_setup_opt_ppc64 [
+# unions need at least 2 fields, but we have only 1 now, but we want to have it as union for future extention
+ featur1 kvm_setup_opt_ppc64_feature
+ featur2 kvm_setup_opt_ppc64_feature
+]
+
+kvm_setup_opt_ppc64_feature {
+ typ const[1, int64]
+ val int64
+}
+
kvm_setup_flags = KVM_SETUP_PAGING, KVM_SETUP_PAE, KVM_SETUP_PROTECTED, KVM_SETUP_CPL3, KVM_SETUP_VIRT86, KVM_SETUP_SMM, KVM_SETUP_VM
define KVM_SETUP_PAGING (1<<0)
generated by ggit (джигит) mrf-deployment (git 2.46.0) at 2026-03-11 20:24:30 +0000