executor, sys/linux, pkg: enable syzos for riscv64

This patch enables syzos for riscv64 and implements
the corresponding pseudo syscalls.

Pseudo syscalls:
  - syz_kvm_setup_syzos_vm
  - syz_kvm_add_vcpu
  - syz_kvm_assert_syzos_uexit

Syzos guest support:
  - guest_uexit
  - guest_execute_code
  - guest_handle_csrr and guest_handle_csrw

Test seeds:
  - riscv64-syz_kvm_setup_syzos_vm
  - riscv64-syz_kvm_setup_syzos_vm-csrr
  - riscv64-syz_kvm_setup_syzos_vm-csrw

3 files changed, 78 insertions, 0 deletions

diff --git a/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm b/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm
new file mode 100644
index 000000000..5942f1b9f
--- /dev/null
+++ b/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm
@@ -0,0 +1,35 @@
+#
+# requires: arch=riscv64 -threaded
+#
+
+r0 = openat$kvm(0, &AUTO='/dev/kvm\x00', 0x0, 0x0)
+r1 = ioctl$KVM_CREATE_VM(r0, AUTO, 0x0)
+r2 = syz_kvm_setup_syzos_vm$riscv64(r1, &(0x7f0000c00000/0x400000)=nil)
+
+# Perform two uexits. The first one is done via a code blob:
+#       lui   a0, 0x40000
+#       addi  a0, a0, 0x100        # a0 = RISCV64_ADDR_UEXIT
+#       sd    zero, 0(a0)
+#       ret
+# The second uexit is done via a syzos API command that sets uexit exit code to 0xaaaa.
+#
+r3 = syz_kvm_add_vcpu$riscv64(r2, &AUTO={0x0, &AUTO=[@code={AUTO, AUTO, {"370500401305051023300500", 0x00008067}}, @uexit={AUTO, AUTO, 0xaaaa}], AUTO}, 0x0, 0x0)
+
+r4 = ioctl$KVM_GET_VCPU_MMAP_SIZE(r0, AUTO)
+r5 = mmap$KVM_VCPU(&(0x7f0000009000/0x1000)=nil, r4, 0x3, 0x1, r3, 0x0)
+
+# Run till the first uexit.
+#
+ioctl$KVM_RUN(r3, AUTO, 0x0)
+syz_kvm_assert_syzos_uexit$riscv64(r3, r5, 0x0)
+# Run till the second uexit.
+#
+ioctl$KVM_RUN(r3, AUTO, 0x0)
+syz_kvm_assert_syzos_uexit$riscv64(r3, r5, 0xaaaa)
+# Run till the end of guest_main(). 0xffffffffffffffff is UEXIT_END.
+#
+ioctl$KVM_RUN(r3, AUTO, 0x0)
+# Ensure that exit reason is KVM_EXIT_MMIO and uexit code is UEXIT_END.
+#
+syz_kvm_assert_syzos_kvm_exit$riscv64(r5, 0x6)
+syz_kvm_assert_syzos_uexit$riscv64(r3, r5, 0xffffffffffffffff)
diff --git a/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm-csrr b/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm-csrr
new file mode 100644
index 000000000..77ea424df
--- /dev/null
+++ b/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm-csrr
@@ -0,0 +1,21 @@
+#
+# requires: arch=riscv64 -threaded
+#
+
+# This test verifies that SYZOS can safely execute CSR access instructions
+# inside a RISC-V KVM guest.
+#
+r0 = openat$kvm(0, &AUTO='/dev/kvm\x00', 0x0, 0x0)
+r1 = ioctl$KVM_CREATE_VM(r0, AUTO, 0x0)
+r2 = syz_kvm_setup_syzos_vm$riscv64(r1, &(0x7f0000c00000/0x400000)=nil)
+
+# Number 0x140 is sscratch (encode).
+#
+r3 = syz_kvm_add_vcpu$riscv64(r2, &AUTO={0x0, &AUTO=[@csrr={AUTO, AUTO, {@valid=0x140}}], AUTO}, 0x0, 0x0)
+r4 = ioctl$KVM_GET_VCPU_MMAP_SIZE(r0, AUTO)
+r5 = mmap$KVM_VCPU(&(0x7f0000009000/0x1000)=nil, r4, 0x3, 0x1, r3, 0x0)
+
+# Run till end of guest_main().
+#
+ioctl$KVM_RUN(r3, AUTO, 0x0)
+syz_kvm_assert_syzos_uexit$riscv64(r3, r5, 0xffffffffffffffff)
diff --git a/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm-csrw b/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm-csrw
new file mode 100644
index 000000000..38fdd4929
--- /dev/null
+++ b/sys/linux/test/riscv64-syz_kvm_setup_syzos_vm-csrw
@@ -0,0 +1,22 @@
+#
+# requires: arch=riscv64 -threaded
+#
+
+# This test verifies that writing a supervisor CSR from the guest is
+# correctly reflected in the KVM vCPU state.
+#
+r0 = openat$kvm(0, &AUTO='/dev/kvm\x00', 0x0, 0x0)
+r1 = ioctl$KVM_CREATE_VM(r0, AUTO, 0x0)
+r2 = syz_kvm_setup_syzos_vm$riscv64(r1, &(0x7f0000c00000/0x400000)=nil)
+
+# Number 0x140 is sscratch (encode).
+#
+r3 = syz_kvm_add_vcpu$riscv64(r2, &AUTO={0x0, &AUTO=[@csrw={AUTO, AUTO, {@valid=0x140, 0xfefefee0}}], AUTO}, 0x0, 0x0)
+r4 = ioctl$KVM_GET_VCPU_MMAP_SIZE(r0, AUTO)
+r5 = mmap$KVM_VCPU(&(0x7f0000009000/0x1000)=nil, r4, 0x3, 0x1, r3, 0x0)
+ioctl$KVM_RUN(r3, AUTO, 0x0)
+syz_kvm_assert_syzos_uexit$riscv64(r3, r5, 0xffffffffffffffff)
+
+# ID 0x8030000003000003 is sscratch (kvm reg id).
+#
+syz_kvm_assert_reg$riscv64(r3, 0x8030000003000003, 0xfefefee0)