executor: x86: Prepare memory layout and hardware constants for NV

This patch lays the groundwork for nested virtualization by rearranging
the KVM guest's memory map.

Key changes include:
- Introducing a dedicated per-VCPU memory region for L2 VMs.
- Updating `executor/kvm.h` with:
    - Adjusted stack addresses for the L1 guest.
    - Detailed memory layout macros for L2 VM structures

2 files changed, 61 insertions, 2 deletions

diff --git a/executor/common_kvm_amd64.h b/executor/common_kvm_amd64.h
index e4c961962..818dc8125 100644
--- a/executor/common_kvm_amd64.h
+++ b/executor/common_kvm_amd64.h
@@ -238,6 +238,8 @@ static const struct mem_region syzos_mem_regions[] = {
     {X86_SYZOS_ADDR_SCRATCH_CODE, 1, 0},
     // CPU stack.
     {X86_SYZOS_ADDR_STACK_BOTTOM, 1, 0},
+    // Per-VCPU regions for L2 VMs.
+    {X86_SYZOS_PER_VCPU_REGIONS_BASE, (KVM_MAX_VCPU * X86_SYZOS_L1_VCPU_REGION_SIZE) / KVM_PAGE_SIZE, 0},
     // IOAPIC memory.
     {X86_SYZOS_ADDR_IOAPIC, 1, 0},
 };
diff --git a/executor/kvm.h b/executor/kvm.h
index fb7b5b49d..835d717ae 100644
--- a/executor/kvm.h
+++ b/executor/kvm.h
@@ -59,11 +59,68 @@
 // Location of the SYZOS guest code. Name shared with ARM64 SYZOS.
 #define SYZOS_ADDR_EXECUTOR_CODE 0x54000
 #define X86_SYZOS_ADDR_SCRATCH_CODE 0x58000
-#define X86_SYZOS_ADDR_STACK_BOTTOM 0x90000
-#define X86_SYZOS_ADDR_STACK0 0x90f80
+#define X86_SYZOS_ADDR_STACK_BOTTOM 0x60000
+#define X86_SYZOS_ADDR_STACK0 0x60f80
+
+// Base address for all per-L1-VCPU regions.
+#define X86_SYZOS_PER_VCPU_REGIONS_BASE 0x70000
+// Size of the entire memory block allocated for a single L1 VCPU to manage its L2 VMs.
+// We need space for 1 VMXON page + 4 L2 VMs. Let's allocate 256KB per L1 VCPU for ample space.
+#define X86_SYZOS_L1_VCPU_REGION_SIZE 0x40000
+
+// Offsets within a single L1 VCPU's region.
+
+// Shared data for the L1 VCPU itself: 1 page for VMXON/HSAVE
+#define X86_SYZOS_L1_VCPU_OFFSET_VM_ARCH_SPECIFIC 0x0000
+// Base offset for the area containing the 4 L2 VM slots.
+#define X86_SYZOS_L1_VCPU_OFFSET_L2_VMS_AREA 0x1000
+
+// Layout of a single L2 VM's data block.
+
+// Size of the memory block for a single L2 VM.
+#define X86_SYZOS_L2_VM_REGION_SIZE 0x8000
+
+// Offsets within a single L2 VM's region.
+#define X86_SYZOS_L2_VM_OFFSET_VMCS_VMCB 0x0000
+#define X86_SYZOS_L2_VM_OFFSET_VM_STACK 0x1000
+#define X86_SYZOS_L2_VM_OFFSET_VM_CODE 0x2000
+// 4 pages for L2 EPT/NPT.
+#define X86_SYZOS_L2_VM_OFFSET_VM_PGTABLE 0x3000
+#define X86_SYZOS_L2_VM_OFFSET_MSR_BITMAP 0x7000
+
+// Subsequent addresses are shifted to accommodate all L1 VCPU regions.
 #define X86_SYZOS_ADDR_UNUSED 0x200000
 #define X86_SYZOS_ADDR_IOAPIC 0xfec00000
 
+#define X86_SYZOS_ADDR_VMCS_VMCB(cpu, vm)                                            \
+	(X86_SYZOS_PER_VCPU_REGIONS_BASE + (cpu) * X86_SYZOS_L1_VCPU_REGION_SIZE +   \
+	 X86_SYZOS_L1_VCPU_OFFSET_L2_VMS_AREA + (vm) * X86_SYZOS_L2_VM_REGION_SIZE + \
+	 X86_SYZOS_L2_VM_OFFSET_VMCS_VMCB)
+
+#define X86_SYZOS_ADDR_VM_CODE(cpu, vm)                                              \
+	(X86_SYZOS_PER_VCPU_REGIONS_BASE + (cpu) * X86_SYZOS_L1_VCPU_REGION_SIZE +   \
+	 X86_SYZOS_L1_VCPU_OFFSET_L2_VMS_AREA + (vm) * X86_SYZOS_L2_VM_REGION_SIZE + \
+	 X86_SYZOS_L2_VM_OFFSET_VM_CODE)
+
+#define X86_SYZOS_ADDR_VM_STACK(cpu, vm)                                             \
+	(X86_SYZOS_PER_VCPU_REGIONS_BASE + (cpu) * X86_SYZOS_L1_VCPU_REGION_SIZE +   \
+	 X86_SYZOS_L1_VCPU_OFFSET_L2_VMS_AREA + (vm) * X86_SYZOS_L2_VM_REGION_SIZE + \
+	 X86_SYZOS_L2_VM_OFFSET_VM_STACK)
+
+#define X86_SYZOS_ADDR_VM_PGTABLE(cpu, vm)                                           \
+	(X86_SYZOS_PER_VCPU_REGIONS_BASE + (cpu) * X86_SYZOS_L1_VCPU_REGION_SIZE +   \
+	 X86_SYZOS_L1_VCPU_OFFSET_L2_VMS_AREA + (vm) * X86_SYZOS_L2_VM_REGION_SIZE + \
+	 X86_SYZOS_L2_VM_OFFSET_VM_PGTABLE)
+
+#define X86_SYZOS_ADDR_MSR_BITMAP(cpu, vm)                                           \
+	(X86_SYZOS_PER_VCPU_REGIONS_BASE + (cpu) * X86_SYZOS_L1_VCPU_REGION_SIZE +   \
+	 X86_SYZOS_L1_VCPU_OFFSET_L2_VMS_AREA + (vm) * X86_SYZOS_L2_VM_REGION_SIZE + \
+	 X86_SYZOS_L2_VM_OFFSET_MSR_BITMAP)
+
+#define X86_SYZOS_ADDR_VM_ARCH_SPECIFIC(cpu)                                       \
+	(X86_SYZOS_PER_VCPU_REGIONS_BASE + (cpu) * X86_SYZOS_L1_VCPU_REGION_SIZE + \
+	 X86_SYZOS_L1_VCPU_OFFSET_VM_ARCH_SPECIFIC)
+
 // SYZOS segment selectors
 #define X86_SYZOS_SEL_CODE 0x8
 #define X86_SYZOS_SEL_DATA 0x10