pkg/ifuzz/powerpc: fuzz instruction bits which are not opcodes

The instructions are made of opcode (split in 1..3 groups of fields) and
parameters (immediate values, register numbers, flags). The insns.go is
expected to have all the bits covered but some bits might be missing which
this randomizes.

This adds preloading of "RS" for better fuzzing of "mtmsr(d)"
instructions ("Move To Machine State Register (Doubleword)").

Signed-off-by: Alexey Kardashevskiy <aik@linux.ibm.com>

0 files changed, 0 insertions, 0 deletions