diff options
| author | Alexander Potapenko <glider@google.com> | 2025-01-09 15:48:13 +0100 |
|---|---|---|
| committer | Alexander Potapenko <glider@google.com> | 2025-01-09 15:16:35 +0000 |
| commit | 40f469132918c1122058244e85c86f7ec6d033aa (patch) | |
| tree | ea12830357f330f700234b6bc1842e4094818bba /executor/common_kvm_arm64_syzos.h | |
| parent | 7cc17001e974d9ff7d7ce042c4e2ad2e8ec0e55e (diff) | |
executor: arm64: fix compiler warnings on inline assembly
Make sure operands passed to 64-bit MOV, MSR and MRS instructions are
actually 64-bit.
This fixes compiler warnings in certain build configurations.
Diffstat (limited to 'executor/common_kvm_arm64_syzos.h')
| -rw-r--r-- | executor/common_kvm_arm64_syzos.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/executor/common_kvm_arm64_syzos.h b/executor/common_kvm_arm64_syzos.h index 65bbf192b..f4c1d1ba0 100644 --- a/executor/common_kvm_arm64_syzos.h +++ b/executor/common_kvm_arm64_syzos.h @@ -235,7 +235,7 @@ GUEST_CODE static noinline void guest_handle_smc(struct api_call_smccc* cmd) // they are ignored as per the calling convention. "smc #0\n" : // Ignore the outputs for now - : [func_id] "r"((uint32)cmd->func_id), + : [func_id] "r"((uint64)cmd->func_id), [arg1] "r"(cmd->params[0]), [arg2] "r"(cmd->params[1]), [arg3] "r"(cmd->params[2]), [arg4] "r"(cmd->params[3]), [arg5] "r"(cmd->params[4]) @@ -257,7 +257,7 @@ GUEST_CODE static noinline void guest_handle_hvc(struct api_call_smccc* cmd) // TODO(glider): nonzero immediate values are designated for use by hypervisor vendors. "hvc #0\n" : // Ignore the outputs for now - : [func_id] "r"((uint32)cmd->func_id), + : [func_id] "r"((uint64)cmd->func_id), [arg1] "r"(cmd->params[0]), [arg2] "r"(cmd->params[1]), [arg3] "r"(cmd->params[2]), [arg4] "r"(cmd->params[3]), [arg5] "r"(cmd->params[4]) @@ -488,7 +488,7 @@ GUEST_CODE static void gicv3_cpu_init(uint32 cpu) gicr_wait_for_rwp(cpu); // Enable the GIC system register (ICC_*) access. - uint32 icc_sre_el1 = 0; + uint64 icc_sre_el1 = 0; asm volatile("mrs %0, " ICC_SRE_EL1 : : "r"(icc_sre_el1)); @@ -498,7 +498,7 @@ GUEST_CODE static void gicv3_cpu_init(uint32 cpu) : "r"(icc_sre_el1)); // Set a default priority threshold. - uint32 value = ICC_PMR_DEF_PRIO; + uint64 value = ICC_PMR_DEF_PRIO; asm volatile("msr " ICC_PMR_EL1 ", %0" : : "r"(value)); @@ -677,7 +677,7 @@ __attribute__((used)) GUEST_CODE static void guest_irq_handler(struct ex_regs* regs) { - uint32 iar0, iar1, irq_num = 0; + uint64 iar0, iar1, irq_num = 0; bool is_group0 = false; // Acknowledge the interrupt by reading the IAR. // Depending on the particular interrupt's Group (0 or 1), its number will appear in either ICC_IAR0_EL1, or ICC_IAR1_EL1. |